Selective Doping for CMP Planarization in Gate-Last Metal Gate Fabrication
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Solution Overview
Problem
Conventional chemical-mechanical planarization (CMP) processes in the gate-last approach for semiconductor manufacturing face challenges in achieving high within-die uniformity, leading to thickness variations and dishing issues in silicon dioxide insulating layers, which result in metal residue between gates and potential short circuits.
Innovation Solution
A CMP method involving selective doping of the insulating layer, where only the protruding parts are doped using ion implantation, followed by CMP to remove these parts and planarize the substrate, enhancing the removal rate and within-die uniformity, and using alkali SiO2-based or alkali CeO2-based slurries with hard or soft pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional CMP process is used on silicon dioxide insulating layer, then the process is simple and fast, but the within-die uniformity is poor and dishing occurs
Solution Approach 1:
The patent applies preliminary action by performing selective doping of the silicon dioxide insulating layer before CMP. The protruding parts are doped with phosphorus or boron to modify their chemical composition, making them more susceptible to removal during subsequent CMP. This preliminary chemical modification enables the CMP process to achieve high within-die uniformity and eliminate dishing, as the doped regions are selectively removed at higher rates than undoped regions.
2Manufacturing precision
If thickness variation of silicon dioxide insulating layer is large, then the insulating layer can cover height differences, but it causes dishing that cannot be covered by subsequent CMP
Solution Approach 1:
The patent applies local quality by creating non-uniform chemical composition within the silicon dioxide insulating layer through selective doping. The protruding parts receive dopant atoms (phosphorus or boron) while recessed parts remain undoped or less doped. This local compositional differentiation enables selective removal during CMP, allowing the process to correct thickness variations and eliminate dishing while maintaining the insulating layer's protective function.
3Reliability
If dishing on silicon dioxide insulating layer is not eliminated, then the structure remains simple, but metal residue between gates occurs causing short circuit
Solution Approach 1:
The patent applies preliminary action by doping the silicon dioxide insulating layer's protruding parts with phosphorus or boron before the CMP process. This chemical modification ensures that during metal gate deposition and subsequent CMP, the doped regions are selectively removed at higher rates, preventing metal residue accumulation between gates. This preliminary chemical preparation eliminates the root cause of short circuits while adding only one doping step to the process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves within-die uniformity, reduces or eliminates dishing, and prevents metal residue between gates, thereby minimizing the risk of short circuits in the device.
Implementation Method 1
selectively doping the insulating layer such that only the protruding part is doped; forming a mask layer with a pattern of the protruding part on the insulating layer, exposing the protruding part; performing ion implantation such that the protruding part is doped
Implementation Method 2
performing CMP on the substrate after doping, to remove the protruding part and planarize the surface of the substrate
Data Source
AI summary
The present invention provides a chemical-mechanical planarization method. The chemical-mechanical planarization method includes: providing a substrate including a gate and source/drain regions on the sides of the gate, the gate and the source/drain regions being overlay by an insulating layer, and the insulating layer including a protruding part above the gate and a recessed part above a surface of the substrate between gates; selectively doping the insulating layer such that only the protruding part is doped; and performing CMP on the substrate after doping, to remove the protruding part and planarize the surface of the substrate. By selectively doping the insulating layer, the method makes only the protruding part of the insulating layer doped, enhancing the corrosive attacks on the material of the protruding part by the slurry in the CMP, and increasing the removal rate of the material of the protruding part by the CMP.