Selective Dummy Writes for Asynchronous Power Loss in Memory

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Solution Overview

Problem

Asynchronous power loss (APL) events in memory sub-systems cause interruptions during write operations, leading to inconsistent data states and high latency, as conventional techniques for handling APL often result in program disturb errors and state level widening due to unnecessary dummy writes.

Innovation Solution

An APL handling component selectively performs dummy write operations on affected pages by determining if the last written page is sufficiently programmed based on a count of zeros, thereby reducing the need for unnecessary dummy writes and minimizing program disturb errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional techniques perform dummy write operations to handle APL events, then data integrity is maintained, but program disturb errors and state level widening occur due to unnecessary dummy writes

Engineering Contradiction:
Improvedata integrityVSAvoidprogram disturb errors
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies partial action by selectively performing dummy write operations only on specific pages that require them, rather than performing dummy writes on all pages. The system identifies pages with insufficient zero counts and performs dummy writes only on those pages, avoiding unnecessary operations on already sufficiently programmed pages and thereby reducing program disturb errors while maintaining data integrity

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If conventional techniques perform dummy write operations on all pages, then data consistency is ensured, but system latency increases due to unnecessary operations

Engineering Contradiction:
Improvedata consistencyVSAvoidsystem latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs dummy write operations only on the subset of pages that require them, determined by evaluating zero counts against a threshold. This partial action approach maintains data consistency where needed while eliminating unnecessary dummy writes on already sufficiently programmed pages, thereby reducing overall system latency and improving performance

Inventive Principle:
Principle #16Partial or excessive action

3Stability of the object's composition

If dummy write operations are performed to handle APL interruptions, then data state consistency is improved, but device complexity increases due to additional operations

Engineering Contradiction:
Improvedata state consistencyVSAvoidoperation complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The system employs a self-service mechanism where each page essentially determines its own need for dummy write operations by having its zero count evaluated. Pages that already have sufficient zero counts automatically qualify for skipping dummy writes, while only pages needing correction undergo dummy write operations. This self-service approach maintains data state consistency while simplifying the overall control logic compared to universal dummy write approaches

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11720259B2Selective dummy writes for asynchronous power loss handling in memory devices
Publication Date: 2023.08.08 MICRON TECHNOLOGY INC
  • US11720259B2 patent drawing
  • US11720259B2 patent drawing
  • US11720259B2 patent drawing

AI summary

An asynchronous power loss (APL) event is detected at a memory device. A last written page is identified in the memory device in response to detecting the APL event. A count of zeros programmed in the last written page is determined. The count of zeros is compared to a threshold constraint to determine whether to perform a dummy write operation on the last written page.