Selective Epitaxial Doping for FinFET Source Drain Uniformity
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Solution Overview
Problem
In semiconductor manufacturing, particularly for FinFET devices, achieving uniform doping of source and drain extensions is challenging due to shadowing effects from side wall spacers and dummy gates, leading to non-uniform dopant concentration and inconsistent transistor performance, especially for features with dimensions below 7 nm.
Innovation Solution
A method involving selective epitaxial deposition of lightly doped and highly doped silicon arsenic (Si:As) or phosphorus (Si:P) layers on monocrystalline surfaces of a substrate, using a halogenated silicon precursor and an arsenic precursor, which allows for uniform doping without ion implantation, thereby avoiding shadowing issues and maintaining the fin's structure integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If ion implantation using a tilted implant beam is used to form source and drain extensions, then the doping process can access the sides of the fin, but the shadowing caused by side wall spacers and dummy gate results in non-uniform dopant concentration
Solution Approach 1:
The patent replaces the mechanical ion implantation process with a chemical vapor deposition (CVD) process. Instead of using a tilted implant beam that physically cannot access shadowed regions, the invention uses gaseous precursors (silane and arsine) that can diffuse and deposit uniformly across all surfaces including those shadowed by spacers and dummy gates. This substitution of mechanical implantation with chemical deposition eliminates the shadowing effect while achieving uniform dopant distribution.
Solution Approach 2:
The patent changes the fundamental parameters of the doping process by transitioning from ion implantation to in-situ CVD. The deposition temperature is controlled at 600-700°C, and the precursor flow rates are optimized to achieve uniform deposition. By changing from a line-of-sight mechanical process to a thermal chemical process, uniform doping is achieved across complex 3D structures without shadowing limitations.
2Reliability
If ion implantation is used for doping, then the process is well-established, but it creates non-uniform doping profile concentration leading to lower ON current and higher OFF leakage
Solution Approach 1:
The patent replaces the mechanical ion implantation process with a chemical vapor deposition process. The CVD method uses gaseous precursors that uniformly deposit across all surfaces including those shadowed by spacers and dummy gates, achieving consistent dopant concentration throughout the source and drain extensions. This eliminates the non-uniform doping profiles that cause performance variability in ion-implanted devices.
3Productivity
If three dimensional stacking of semiconductor device features is used to increase circuit density, then more transistors can be located in a given size, but shadowing effects from spacers and dummy gate make uniform doping difficult
Solution Approach 1:
The patent replaces mechanical ion implantation with chemical vapor deposition to enable uniform doping in 3D FinFET structures. The gaseous precursors can access and deposit uniformly on vertical fin surfaces and regions shadowed by spacers and dummy gates, achieving consistent dopant concentration throughout the three-dimensional source and drain extensions while maintaining high circuit density.
4Ease of operation
If a tilted implant beam is used to access shadowed regions, then doping can reach all areas, but the beam geometry causes lower dopant concentration toward the top of the fin
Solution Approach 1:
The patent replaces the geometrically constrained tilted ion implantation beam with a chemical vapor deposition process. The gaseous precursors diffuse and deposit uniformly across vertical surfaces without being limited by beam angle or shadowing geometry. This achieves consistent dopant concentration from the base to the top of the fin structures, eliminating the vertical non-uniformity inherent in tilted implantation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables self-aligned, uniformly doped source and drain extensions with abrupt dopant concentration at the interface, improving current flow and reducing OFF leakage, thus enhancing the reliability and performance of FinFET devices.
Implementation Method 1
selectively epitaxial deposition of lightly doped and highly doped silicon arsenic (Si:As) or phosphorus (Si:P) layers on monocrystalline surfaces
Implementation Method 2
A gas containing a halogenated silicon precursor, an arsenic precursor, and a carrier gas are flowed into the processing chamber and the heated substrate is exposed thereto. The gas reacts with, and selectively 'grows', i.e., epitaxial forms by a deposition process, a lightly doped Si:As epitaxial layer
Implementation Method 3
A substrate having both monocrystalline surfaces, and polycrystalline and/or amorphous surfaces, is loaded into a processing chamber, and is heated to a desired processing temperature
Data Source
AI summary
A device comprising Si:As source and drain extensions and Si:As or Si:P source and drain features formed using selective epitaxial growth and a method of forming the same is provided. The epitaxial layers used for the source and drain extensions and the source and drain features herein are deposited by simultaneous film formation and film etching, wherein the deposited material on the monocrystalline layer is etched at a slower rate than deposition material deposited on non-monocrystalline location of a substrate. As a result, an epitaxial layer is deposited on the monocrystalline surfaces, and a layer is not deposited on non-monocrystalline surfaces of the same base material, such as silicon.