Selective Epitaxial Growth for Cost-Effective Silicon-on-Insulator Structures

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Solution Overview

Problem

The high cost of silicon-on-insulator (SOI) substrates compared to bulk silicon wafers, particularly in manufacturing optical devices, and the challenge of forming SOI layers of varying sizes in required regions for semiconductor devices.

Innovation Solution

A method involving the formation of a silicon-on-insulator structure with a non-crystalline silicon portion and a single crystalline silicon portion, where the non-crystalline silicon is replaced with an amorphous silicon portion and crystallized using the single crystalline silicon as a seed, allowing for lateral growth of single crystalline silicon, and subsequent annealing processes to convert amorphous silicon layers into single crystalline silicon, enabling cost-effective formation of SOI layers on bulk silicon wafers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional SOI substrates are used, then high quality single crystalline silicon is obtained, but manufacturing cost increases significantly

Engineering Contradiction:
Improvesingle crystalline silicon qualityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The substrate is divided into two distinct regions: a bulk silicon region and an SOI region with insulating layer and single crystalline silicon layer. This segmentation allows different areas to serve different functions, enabling cost reduction in non-critical areas while maintaining high quality where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Single crystalline silicon structure is formed only in specific required regions rather than across the entire substrate. The insulating layer is introduced locally to create SOI structures only where performance requirements demand it, reducing overall manufacturing cost while maintaining reliability in critical areas.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If SOI layers of varying sizes are formed in required regions, then device design flexibility is improved, but process complexity increases

Engineering Contradiction:
ImproveSOI layer size variabilityVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The insulating layer is formed in advance during the bulk silicon processing stage, before the single crystalline silicon layer is grown. This preliminary action defines the future SOI region boundaries, enabling flexible SOI layer formation without requiring complex post-processing steps for each different size configuration.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulating layer is introduced as a vertical dimension element between the bulk silicon and the single crystalline silicon layer. This vertical separation enables horizontal flexibility in SOI layer sizing and positioning without affecting the underlying bulk silicon structure, simplifying the achievement of various SOI layer configurations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the cost-effective formation of SOI layers with predetermined widths, suitable for semiconductor devices and optical waveguides, overcoming the limitations of traditional SOI substrate costs and size variability.

Implementation Method 1

the amorphous and single crystalline portions can be crystallized using the single crystalline silicon portion as a seed to form a laterally grown single crystalline silicon portion

Methodology Applied
Scientific EffectLateral epitaxial growth: Epitaxy

Implementation Method 2

A primary annealing can be performed to convert a-Si in the first amorphous silicon layer into single-crystalline Si... A secondary annealing process can be performed to convert a-Si in the second amorphous silicon layer into single-crystalline Si

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS8735265B2Methods of selectively forming silicon-on-insulator structures using selective expitaxial growth process
Publication Date: 2014.05.27 SAMSUNG ELECTRONICS CO LTD
  • US8735265B2 patent drawing
  • US8735265B2 patent drawing
  • US8735265B2 patent drawing

AI summary

A method of forming a silicon based optical waveguide can include forming a silicon-on-insulator structure including a non-crystalline silicon portion and a single crystalline silicon portion of an active silicon layer in the structure. The non-crystalline silicon portion can be replaced with an amorphous silicon portion and maintaining the single crystalline silicon portion and the amorphous portion can be crystallized using the single crystalline silicon portion as a seed to form a laterally grown single crystalline silicon portion including the amorphous and single crystalline silicon portions.