Selective Film Deposition on Conductive Features in Narrow Trenches
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in forming thin films with precise dimensions and specific shapes, especially on three-dimensional structures and in narrow trenches, as existing methods face difficulties in achieving precise control and alignment.
Innovation Solution
A method involving the formation of a blocking layer using self-assembled monolayers to selectively deposit films on conductive features, allowing for precise control over film deposition without the need for blanket layers, which reduces photolithography-related misalignment and enables deposition on vertical sidewalls in narrow trenches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If blanket film deposition is used, then complete coverage is achieved, but misalignment and poor shape control occur
Solution Approach 1:
The patent applies local quality by creating different surface properties in different areas. A blocking layer is formed on specific regions (e.g., trench sidewalls) that prevents film deposition, while other regions remain receptive to deposition. This allows selective film formation on conductive features without affecting blocked areas, achieving precise shape control and alignment without blanket deposition issues
Solution Approach 2:
The blocking layer serves as an intermediary element that mediates between the deposition process and the substrate. It selectively prevents film deposition on certain surfaces (trench sidewalls) while allowing deposition on conductive features, thereby controlling film shape and position without requiring complex photolithography alignment
2Measurement precision
If photolithography alignment is used, then pattern definition is achieved, but misalignment errors occur
Solution Approach 1:
The blocking layer is formed through self-assembled monolayers that automatically organize on specific surfaces without requiring external alignment processes. The film deposition process itself is self-aligned to the conductive features, eliminating photolithography alignment errors and achieving precise pattern definition through the inherent self-organizing properties of the blocking layer
3Area of stationary object
If film deposition on vertical sidewalls is attempted, then complete coverage is achieved, but poor crystallinity and shape control occur
Solution Approach 1:
The patent extracts or removes the problematic vertical sidewall surfaces from the deposition process by applying a blocking layer to them. This prevents film deposition on vertical sidewalls where poor crystallinity would occur, while allowing deposition only on horizontal or favorably oriented surfaces of conductive features, ensuring high crystallinity and shape control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise and controlled deposition of films, improving the crystallinity and reducing the issues associated with blanket film deposition, allowing for the formation of semiconductor features with desired shapes and dimensions.
Implementation Method 1
forming a blocking layer using self-assembled monolayers to selectively deposit films on conductive features
Implementation Method 2
selectively forming a hydrophobic blocking layer on the dielectric base layer outside of the conductive feature
Implementation Method 3
selectively forming a plurality of hydroxyl groups on the conductive feature outside of the hydrophobic blocking layer
Data Source
AI summary
A method for manufacturing a semiconductor feature includes: alternatingly forming first and second dielectric layers on a semiconductor substrate along a vertical direction; forming multiple spaced-apart trenches penetrating the first and second dielectric layers; forming multiple support segments filling the trenches; removing the second dielectric layers to form multiple spaces; forming multiple conductive layers filling the spaces; removing the support segments to expose the conductive layers and the first dielectric layers; selectively forming a blocking layer covering the first dielectric layers outside of the conductive layers; forming multiple selectively-deposited sub-layers on the exposed conductive layers outside of the blocking layer and each connected to one of the conductive layers; forming multiple channel sub-layers on the selectively-deposited sub-layers outside of the blocking layer; removing the blocking layer; forming multiple isolation sub-layers filling the trenches; and forming multiple source/drain segments each connected to corresponding ones of the channel sub-layers.