Selective Gate Cap Deposition for Source/Drain Contact Leakage
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Solution Overview
Problem
The scaling down of semiconductor integrated circuits leads to increased complexity and power dissipation, which can result in leakage currents due to the thinning of protective caps during the etching process for source/drain contact formation, reducing the yield of semiconductor devices.
Innovation Solution
A selective deposition process is employed to form a cap material over the thinned protective cap in the source/drain contact opening, increasing the distance between the gate structure and the source/drain contact, thereby preventing leakage currents and improving the yield of semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the protective cap is thinned during the etching process for source/drain contact formation, then the etching precision is improved, but the reliability deteriorates due to leakage currents
Solution Approach 1:
A capping material is deposited on the protective cap before the etching process to prevent excessive thinning. This preliminary protective action ensures that the protective cap maintains adequate thickness throughout the etching process, preventing leakage currents while still allowing precise source/drain contact formation.
Solution Approach 2:
The capping material serves as an intermediary layer between the etchant and the protective cap. This intermediary protects the protective cap from excessive etching while allowing the etching process to proceed with sufficient precision for source/drain contact formation.
2Productivity
If the geometry size is scaled down, then the productivity is improved, but the harmful factors increase due to higher power dissipation and leakage currents
Solution Approach 1:
The capping material, which may seem like an additional complex step, actually converts the harmful effect of excessive etching into a beneficial protective mechanism. By intentionally adding this layer, the process compensates for the increased vulnerability to leakage currents that arises from scaled-down geometry, thereby maintaining reliability while benefiting from higher productivity.
Solution Approach 2:
The deposition of capping material changes the physical parameters of the protective cap structure, adding a layer that modifies the etching rate and final thickness. This parameter change ensures that even as geometry scales down and devices become more vulnerable to leakage, the protective cap maintains adequate thickness to prevent harmful effects.
3Ease of manufacture
If a standard deposition process is used, then the ease of manufacture is improved, but the manufacturing precision deteriorates due to non-selective deposition on surrounding structures
Solution Approach 1:
The selective deposition process applies different deposition rates to different locations. The capping material deposits preferentially on the protective cap surface while minimizing deposition on surrounding structures like gate spacers and interlayer dielectric. This local quality difference achieves precise coverage where needed without compromising process simplicity.
Solution Approach 2:
The selective deposition process uses partial action by targeting specific surfaces (protective cap) with higher deposition priority. The process is designed to deposit material selectively on the protective cap while allowing minimal or no deposition on surrounding structures, achieving precision without requiring overly complex process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The selective deposition of cap material effectively prevents leakage currents, enhancing the yield and reliability of semiconductor devices by maintaining an adequate thickness of the protective cap during the source/drain contact formation process.
Implementation Method 1
A selective deposition process is employed to form a cap material over the thinned protective cap
Data Source
AI summary
The method for forming a semiconductor device includes forming gate spacers on a substrate; forming a gate structure on the substrate and laterally between the gate spacers; forming a protective cap over the gate structure and laterally between the gate spacers; forming source/drain structures over the substrate and on opposite sides of the gate structure; depositing a dielectric layer over the protective cap, the gate spacers, and the source/drain structures; performing an etching process on the dielectric layer to form an opening exposing one of the source/drain structures, the etching process further etching a first one of the gate spacers to expose the protective cap; selectively depositing a capping material on the exposed protective cap; forming a source/drain contact in the opening.