Selective Gate Insulating Film for Flexible Electro-Optical Substrates
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Solution Overview
Problem
The use of plastic substrates in electro-optical devices is hindered by stress-induced bending, complex manufacturing processes, and resource wastage due to the formation of gate insulating films over the entire substrate, which complicates contact hole formation and increases costs.
Innovation Solution
A substrate design where the gate insulating film and interlayer insulating film are selectively applied using methods like ink jetting, reducing stress and resource usage, and eliminating the need for extensive etching processes, with connection wires formed in the same film as the pixel electrode to avoid contact holes and simplify manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate insulating film is formed over the entire surface of the substrate, then electrical insulation is improved, but substrate bending increases due to stress
Solution Approach 1:
The gate insulating film is selectively formed only in regions where transistors are located, rather than covering the entire substrate. This localized formation reduces overall film stress while maintaining necessary electrical insulation properties in active areas.
Solution Approach 2:
The substrate surface is divided into regions with gate insulating film (transistor areas) and regions without film (connection wire areas). This segmentation allows differential stress distribution, reducing overall substrate bending while preserving electrical insulation where needed.
2Reliability
If a gate insulating film is formed over the entire surface of the substrate, then electrical insulation is improved, but manufacturing complexity increases due to contact hole formation
Solution Approach 1:
The gate insulating film is extracted or removed from regions where connection wires are formed, eliminating the need to form contact holes through the gate insulating film. This simplifies the manufacturing process while maintaining electrical insulation in transistor regions.
Solution Approach 2:
Instead of forming contact holes through the gate insulating film to reach underlying structures, the approach is inverted: the gate insulating film is simply not formed in connection wire regions, allowing direct wire formation without etching or contact hole creation.
3Reliability
If a gate insulating film is formed over the entire surface of the substrate, then electrical insulation is improved, but resource consumption increases
Solution Approach 1:
The gate insulating film is applied only where electrical insulation is required (transistor regions), rather than uniformly across the entire substrate. This reduces material consumption while maintaining necessary insulation properties.
Solution Approach 2:
Instead of forming the gate insulating film completely over the entire substrate (excessive action), the film is formed only in the necessary regions (partial action), reducing material waste while achieving the required electrical insulation function.
4Adaptability or versatility
If connection wires are formed under the gate insulating film, then routing flexibility is improved, but manufacturing complexity increases due to contact holes
Solution Approach 1:
The gate insulating film is removed or not formed in specific regions to allow connection wires to be formed directly on the substrate surface. This eliminates the need for contact holes while maintaining routing flexibility.
Solution Approach 2:
The gate insulating film formation process is planned in advance to exclude connection wire regions, preventing the need for subsequent contact hole formation. This preliminary planning simplifies the overall manufacturing sequence.
Data Source
AI summary
A electro-optical device is provide with a substrate, a pixel electrode provide for each pixel, a pixel transistor which is provided for each pixel more to a lower layer side through an interlayer insulating film than the pixel electrode and is connected to the pixel electrode, a periphery transistor provided in a periphery region, and a connection wire formed in the same film as the pixel electrode in a region where the interlayer insulating film and a gate insulating film included in the pixel transistor and the periphery transistor are not formed, and electrically connected to the periphery transistor.