Selective Graphene Growth via Insulating Buffer Layer
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Solution Overview
Problem
Current methods for patterning graphene in semiconductor devices, such as direct laser raster writing and photolithography, face challenges in achieving high resolution and low production cycle time, with direct laser raster writing producing insufficiently fine patterns and photolithography increasing sheet resistance due to the use of chemical reagents.
Innovation Solution
A method involving a substrate with dielectric layers, patterned gate lines, and an insulating buffer layer, where a graphene layer is selectively grown using chemical vapor deposition at 900-1000° C, avoiding the limitations of existing methods by using a dual-gate structure with specific dielectric and buffer materials to enhance pattern resolution and reduce production complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If direct laser raster writing method is used to pattern graphene, then no chemical reagents are introduced, but the pattern resolution is insufficient and production cycle is long
Solution Approach 1:
The patent introduces an insulating buffer layer as an intermediary substrate for selective graphene growth. This buffer layer enables precise patterning of graphene through selective area growth rather than direct laser writing, achieving high pattern resolution without requiring chemical reagents for etching or patterning the graphene itself.
Solution Approach 2:
The insulating buffer layer is formed beforehand on the substrate before graphene growth. This preliminary preparation creates predefined regions where graphene will selectively grow, enabling high-resolution patterns to be achieved through controlled growth rather than post-growth patterning, thus reducing production cycle time.
2Manufacturing precision
If photolithography method is used to pattern graphene, then pattern resolution can be improved, but sheet resistance increases due to chemical reagents
Solution Approach 1:
The insulating buffer layer serves as a mediator that enables precise graphene patterning through selective growth. This eliminates the need for photolithography and chemical etching processes, thereby preventing the increase in sheet resistance that would otherwise result from chemical reagent exposure.
Solution Approach 2:
The patent replaces the chemical-based photolithography and wet etching process with a physical vapor deposition or CVD-based selective growth process. This substitution uses controlled chemical vapor deposition under specific conditions to grow graphene only in desired patterns, avoiding the harmful effects of liquid chemical reagents on the graphene's electrical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the speedy manufacturing of high-quality semiconductor devices with improved pattern resolution and reduced sheet resistance, facilitating better current control and cost-effective production.
Implementation Method 1
selectively growing a graphene layer on the patterned insulating buffer layer
Data Source
AI summary
The present disclosure relates to the technical field of semiconductor processes and discloses a semiconductor device and a manufacturing method therefor. The method includes: providing a substrate containing a first dielectric layer; forming a lower gate material layer on the first dielectric layer; patterning the lower gate material layer to form gate lines; depositing a second dielectric layer to cover the gate lines; planarizing the second dielectric layer; forming an insulating buffer material layer; patterning the insulating buffer material layer to form a patterned insulating buffer layer containing multiple separate portions, each separate portion extending to intersect one or more gate lines; selectively growing a graphene layer on the patterned insulating buffer layer; forming a third dielectric layer to cover the graphene layer and the second dielectric layer; and forming an upper gate electrode layer on the third dielectric layer. In the present disclosure, a patterned graphene layer may be obtained by means of the selective growth of graphene, thereby avoiding undesired effects from patterning the graphene. In addition, the semiconductor device of the present disclosure may use a dual-gate structure that can offer better current control.