Selective Non-Uniform Heating for 3D Chip Stack Warping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Warping of components during 3D integrated circuit assembly leads to failed solder bump connections and short circuits, particularly challenging as chip size increases and component thickness decreases, affecting the reliability of 3D chip packaging.
Innovation Solution
A method involving selective non-uniform heating and uniform pressure to achieve solid state diffusion of solder bumps into metallic contacts, followed by a reflow step where the second plurality of solder bumps achieves reflow temperature before the first, ensuring proper alignment and attachment of components despite warping, using a multi-step assembly process with temporary bonding and subsequent reflow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform heating is applied to all solder bumps simultaneously, then the assembly process is simple, but warping causes misalignment and connection failures
Solution Approach 1:
The patent applies selective area heating where different regions of the substrate receive different heating treatments. Specifically, the first plurality of solder bumps is heated to a first temperature while the second plurality is heated to a second temperature, with the second temperature being higher than the first. This local differentiation compensates for warping effects in specific areas, ensuring proper alignment and connection integrity without requiring complex uniform heating across the entire assembly.
Solution Approach 2:
The patent performs preliminary heating of the first plurality of solder bumps to a lower temperature before final assembly, creating a staged heating sequence. This preliminary action allows the structure to be pre-positioned and stabilized before the second plurality of solder bumps is heated to the higher temperature for final bonding, preventing warping-induced misalignment during the assembly process.
2Strength
If higher temperature is applied to all solder bumps, then bonding strength is improved, but bridging and short circuits occur
Solution Approach 1:
The patent applies different temperature levels to different groups of solder bumps based on their specific bonding requirements and warping compensation needs. The first plurality of solder bumps is heated to a first temperature sufficient for bonding, while the second plurality is heated to a higher second temperature. This localized temperature control ensures each group achieves adequate bonding strength without excessive heat causing bridging or short circuits in other areas.
Solution Approach 2:
The patent divides the solder bumps into at least two distinct pluralities (first and second) that are heated to different temperatures. This segmentation allows independent temperature control for each group, enabling optimization of bonding strength for each location while preventing harmful effects like bridging in areas where lower temperature is sufficient.
3Reliability
If multi-step selective heating process is used, then warping compensation is improved, but processing time increases
Solution Approach 1:
The patent implements a periodic, staged heating process where the first plurality of solder bumps is heated to a first temperature in an initial stage, followed by heating the second plurality to a higher second temperature in a subsequent stage. This periodic action sequence efficiently compensates for warping at different locations and times during assembly, achieving high reliability while managing processing time through optimized heating cycles rather than continuous uniform heating.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes warping issues, prevents bridging, and ensures reliable electromechanical connections by controlling heating and pressure in the 3D assembly process, enhancing the assembly of 3D packages with improved connection integrity and reduced processing time.
Implementation Method 1
applying a first selective non-uniform heat and a first uniform pressure to the first plurality of solder bumps, resulting in solid state diffusion of the first plurality of solder bumps into the first plurality of metallic contacts of the laminate chip carrier
Implementation Method 2
heating the 3D package, the first plurality of solder bumps, and the second plurality of solder bumps to a temperature greater than the reflow temperature of the first plurality of solder bumps and the reflow temperature of the second plurality of solder bumps
Data Source
AI summary
A method of forming a 3D package. The method may include joining an interposer to a laminate chip carrier with the solid state diffusion of a first plurality of solder bumps by applying a first selective non-uniform heat and first uniform pressure; joining a top chip to the interposer with the solid state diffusion of a second plurality of solder bumps by applying a second selective non-uniform heat and second uniform pressure; heating the 3D package, the first and second pluralities of solder bumps to a temperature greater than the reflow temperature of the first and second pluralities of solder bumps, where the second plurality of solder bumps achieves the reflow temperature before the first plurality of solder bumps, where the first and second selective non-uniform heats being less that the reflow temperature of the first and second pluralities of solder bumps, respectively.