Selective Memory Mitigation for Runtime Error Reduction

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Solution Overview

Problem

Existing memory management systems in computing devices face challenges in mitigating memory errors caused by programming bugs, which can lead to application crashes and poor user experience, and current debugging tools are limited in detecting and resolving these issues during runtime.

Innovation Solution

A memory management module that operates in different modes for each software module, performing mitigation actions such as allocating extra memory and monitoring their effectiveness to reduce the likelihood of memory errors, with the ability to selectively enable these actions based on statistical analysis and user experience data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If debugging tools are used to detect memory errors during developmental testing, then memory errors can be identified, but these tools cannot be used during runtime of the software application

Engineering Contradiction:
Improvememory error detectionVSAvoidruntime applicability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments memory into allocated pages and guard pages, with guard pages serving as a separate monitoring mechanism that can operate during runtime without interfering with application execution. This segmentation allows error detection to continue functioning across different operational phases.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces guard pages as an intermediary mechanism between the application and the memory management system. These guard pages act as a buffer that can monitor memory access patterns during runtime without requiring the application to be in debugging mode, thus enabling runtime error detection.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If mitigation actions are performed for all software modules, then memory errors are reduced, but system performance is degraded due to overhead

Engineering Contradiction:
Improvememory error reductionVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies mitigation actions selectively based on the specific needs of each software module. By analyzing error patterns and applying mitigations only where necessary rather than universally, the system maintains high reliability for vulnerable modules while minimizing performance overhead for stable modules.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements partial mitigation by applying guard pages and monitoring only to software modules that have demonstrated memory error patterns. This partial action approach provides sufficient protection for problematic modules without imposing the full overhead of universal mitigation across all system components.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If extra memory is allocated and marker values are written to prevent buffer overruns, then memory errors are mitigated, but memory consumption increases

Engineering Contradiction:
Improvebuffer overrun preventionVSAvoidmemory consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent allocates guard pages in advance during the memory allocation phase, before any buffer overrun can occur. This preliminary action establishes protective boundaries upfront, preventing errors without requiring additional memory allocations during runtime execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by placing guard pages adjacent to allocated memory regions. These guard pages serve as a protective buffer that absorbs potential buffer overrun errors before they can corrupt actual data, providing error mitigation without significantly increasing the memory footprint of the application.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentEP2329371B1Evaluating effectiveness of memory management techniques selectively using mitigations to reduce errors
Publication Date: 2019.10.23 MICROSOFT TECHNOLOGY LICENSING LLC
  • EP2329371B1 patent drawingFigure 1
  • EP2329371B1 patent drawingFigure 2A
  • EP2329371B1 patent drawingFigure 2B

AI summary

A mitigation enablement module for a computer that improves application reliability. When performing memory management operations, the mitigation enablement module and associated memory manager selectively use mitigations that are intended to prevent an application bug from cause an application error. The memory manager may selectively apply mitigations for each of one or more applications based on the likelihood that such mitigations are successful at preventing bugs from causing application errors. The likelihood is determined from historical information on whether the mitigations, when applied, prevented bugs from causing memory operations that could cause application errors. This historical information can be gathered on a single computer over multiple invocations of the application or may be aggregated from multiple computers, each invoking the application. The determined likelihood may then be used to determine whether or for how long to apply the mitigation actions for memory operations requested by the application.