Selective Passivation Patterning for Tight Critical Dimension Control
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in forming advanced features with small critical dimensions due to the difficulty in controlling etch-stop layer thickness, which affects patterning accuracy and complexity increases with higher device densities.
Innovation Solution
A method involving the selective deposition of a conformal passivation layer and an etch-stop layer on a substrate, using cyclic processes to enhance patterning accuracy and reduce feature size, including the use of materials like transition metals and organic polymers to control etch selectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If simple lithography steps are used for patterning, then the process is simple and cost-effective, but the feature density and critical dimension control are insufficient for advanced devices
Solution Approach 1:
The patterning process is segmented into multiple sequential steps: forming mandrels, depositing first spacers, removing mandrels, depositing second spacers, and selective removal. This segmentation allows each step to be optimized independently, achieving high patterning precision while maintaining process manageability through modular fabrication steps
Solution Approach 2:
Mandrels are formed as preliminary structures before the actual pattern transfer. These mandrels serve as templates that guide subsequent spacer deposition and pattern formation, enabling precise feature definition before final pattern completion
2Manufacturing precision
If etch-based processes with etch-stop layers are used to achieve narrow structures, then feature density increases, but the control of etch-stop layer thickness becomes challenging and reduces patterning accuracy
Solution Approach 1:
The process replaces traditional etch-based patterning with a deposition-based approach using atomic layer deposition (ALD) for spacer formation. This substitution eliminates reliance on etch-stop layer thickness control and instead uses precisely controllable deposition processes to define feature dimensions, achieving superior thickness uniformity and patterning accuracy
Solution Approach 2:
The methodology changes the controlling parameter from etch-stop layer thickness to spacer layer thickness, which is more precisely controllable through ALD deposition. By changing the fundamental parameter that defines feature size, the process achieves better precision without the challenges of etch-stop layer control
3Manufacturing precision
If feature density is increased beyond simple lithography capability, then device capacity increases, but the critical dimension control and patterning accuracy deteriorate
Solution Approach 1:
The pattern formation uses nested structures where spacers are deposited conformally on mandrels, creating a nested arrangement. This nested approach allows precise control of outer dimensions while maintaining inner feature integrity, enabling high feature density with excellent critical dimension control through conformal deposition geometry
Solution Approach 2:
The process transitions from two-dimensional lithographic patterning to three-dimensional spacer-based patterning. By utilizing vertical deposition dimensions and conformal coating geometry, the method achieves superior critical dimension control that enables higher feature density while maintaining precision through dimensional leverage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves patterning accuracy and reduces feature size while potentially lowering costs and increasing throughput in semiconductor device manufacturing.
Implementation Method 1
a precursor injector system constructed and arranged to provide a passivation material precursor and an etch stop material precursor into the reaction chamber in a vapor phase
Data Source
AI summary
The disclosure relates to the manufacture of semiconductor devices, especially to methods and processing assemblies for forming a patterned structure on a substrate. The methods comprise providing the substrate comprising a first structure into a reaction chamber, wherein a surface of the first structure comprises a first material and the substrate comprises a second material, and selectively depositing a conformal passivation layer on the first material relative to the second material to cover the first structure, and selectively depositing an etch-stop layer on the second material relative to the passivation layer. In some embodiments, a multiple patterning or a tone reversal of a pattern may be performed using the methods and deposition assemblies of the disclosure.