Selective per die performance binning for multi-die assembly yield
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Solution Overview
Problem
The challenge in assembling multi-die devices is the low yield due to manufacturing variations, where only a small percentage of dies meet the high performance requirements, leading to many fabricated dies being unusable, especially when customers demand high performance features at low voltage.
Innovation Solution
The method involves testing and binning dies based on performance values, reserving specific locations for high performance dies and using lower performance dies in other locations, ensuring only one die with high performance features is accessed through designated output connections, thereby increasing yield and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all dies are selected to meet the critical performance value, then the device reliability is improved, but the manufacturing yield deteriorates
Solution Approach 1:
The patent applies local quality by differentiating performance requirements across different die locations. Critical locations (e.g., locations connected to output connections) require high-performance dies meeting the critical performance value, while non-critical locations can accommodate lower-performance dies. This spatial differentiation of quality requirements resolves the contradiction by ensuring reliability only where necessary, thereby improving manufacturing yield without compromising device functionality.
2Reliability
If only high performance dies are used, then the device performance is improved, but the manufacturing cost increases
Solution Approach 1:
The patent implements local quality by assigning high-performance dies only to critical locations where they are needed for device performance, while using lower-performance dies in non-critical locations. This selective allocation reduces the overall number of expensive high-performance dies required, thereby lowering manufacturing costs while maintaining the necessary device performance through strategic placement of high-performance components.
Solution Approach 2:
The patent applies partial action by using high-performance dies only partially - specifically in the subset of locations where critical performance is required. Rather than uniformly deploying high-performance dies across all locations, the method uses them only where necessary, reducing overall manufacturing cost while maintaining performance in critical areas.
3Manufacturing precision
If manufacturing variations are reduced, then the performance consistency is improved, but the fabrication complexity increases
Solution Approach 1:
The patent applies parameter changes by shifting from a uniform performance requirement approach to a location-dependent performance requirement approach. Instead of attempting to reduce manufacturing variations across all dies (which would increase fabrication complexity), the method changes the performance parameters required at different locations, accepting variations but managing them through selective placement and binning strategies.
Data Source
AI summary
Embodiments herein describe binning and placement techniques for assembling a multi-die device to improve yield when a customer requests a high performance feature from the device. For example, the multi-die device may include multiple dies that are interconnected to form a single device or package. In one embodiment, the multiple dies are the same semiconductor die (e.g., have the same circuit layout) which are disposed on a common interposer or stacked on each other. The multi-die device can then be attached to a printed circuit board (PCB). Although the dies in the multi-die device may each include the same feature (e.g., a PCIe interface, SerDes interface, transmitter, memory interface, etc.), the multi-die device is assembled so that not all of the dies have a feature that satisfies the high performance requested by the customer. That is, at least one of the die includes a lower performance feature.