Selective Planishing for Semiconductor Leadframe Adhesion

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Solution Overview

Problem

The existing methods for improving adhesion between leadframes and molding compounds in semiconductor packages, such as chemical etching and selective roughening, are costly and lead to deformation issues during the degating process, increasing fabrication costs and yield losses.

Innovation Solution

A method involving a planishing station integrated with the offset-and-cutting tool to selectively smooth the roughened leadframe surfaces in the gate area, reducing adhesion to molding compounds and preventing deformation, while maintaining low-cost fabrication processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the leadframe surface is roughened by chemical etching or selective roughening to improve adhesion to molding compound, then adhesion strength is improved, but fabrication cost increases and deformation occurs during degating

Engineering Contradiction:
Improveadhesion strengthVSAvoidfabrication cost
Core Design Contradiction:
StrengthVSEase of manufacture

Solution Approach 1:

The patent applies local quality by roughening only specific areas of the leadframe surface (areas that will contact molding compound in cavities) while leaving other areas (runner areas) smooth. This is achieved through selective masking during the chemical etching process, allowing the leadframe to have different surface properties in different locations - rough where adhesion is needed and smooth where deformation should be prevented.

Inventive Principle:
Principle #3Local quality

2Strength

If the leadframe surface is roughened to improve adhesion, then adhesion strength is improved, but leadframe deformation occurs during degating process

Engineering Contradiction:
Improveadhesion strengthVSAvoidleadframe deformation
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent applies local quality by roughening only specific areas of the leadframe surface (areas that will contact molding compound in cavities) while leaving other areas (runner areas) smooth. This is achieved through selective masking during the chemical etching process, allowing the leadframe to have different surface properties in different locations - rough where adhesion is needed and smooth where deformation should be prevented.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If selective roughening is applied to reduce adhesion in runner areas, then deformation is prevented, but adhesion strength in cavity areas may be compromised

Engineering Contradiction:
Improveleadframe deformationVSAvoidadhesion strength
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The patent applies local quality by roughening only specific areas of the leadframe surface (areas that will contact molding compound in cavities) while leaving other areas (runner areas) smooth. This is achieved through selective masking during the chemical etching process, allowing the leadframe to have different surface properties in different locations - rough where adhesion is needed and smooth where deformation should be prevented.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the leadframe surface into distinct functional zones: cavity contact areas that are roughened for strong adhesion and runner areas that remain smooth to prevent deformation. The masking process physically divides the surface treatment, applying etching only to selected regions while protecting other regions from the etchant.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces adhesion to molding compounds in critical areas, preventing leadframe deformation and maintaining reliable adhesion elsewhere, thus enhancing the yield and reducing fabrication costs.

Implementation Method 1

a planishing station integrated with the offset-and-cutting tool to selectively smooth the roughened leadframe surfaces

Methodology Applied
Scientific EffectPlanishing:

Implementation Method 2

The adhesion between copper-based leadframes and epoxy-based molding compounds can be improved by adding design features such as indentations, grooves or protrusions to the leadframe surface

Methodology Applied
Scientific EffectMechanical interlocking:

Implementation Method 3

Chemical etching is a subtractive process using an etchant. Chemical etching creates a micro-crystalline metal surface with a roughness on the order of 1 μm or less

Methodology Applied
Scientific EffectChemical etching:

Implementation Method 4

the use of a specialized metal plating bath, such as a nickel plating bath, to deposit a rough metal (such as nickel) layer

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS10438816B2Selective planishing method for making a semiconductor device
Publication Date: 2019.10.08 TEXAS INSTRUMENTS INC
  • US10438816B2 patent drawing
  • US10438816B2 patent drawing
  • US10438816B2 patent drawing

AI summary

In a method for fabricating semiconductor devices a leadframe pattern is formed from a flat tape of base metal. A plurality of additional metal layers is plated on the patterned tape of base metal. The surface of the metal layers is roughed. A plurality of sites for assembling semiconductor chips are created. The sites alternate with zones for connecting the leadframe pattern to molding compound runners A selected first set of leadframe areas are selectively planished creating flattened areas offsetting a second set of leadframe areas. A semiconductor chip is attached to each site.