Selective Power Disable for Faulty Memory Devices

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Solution Overview

Problem

Information handling systems face inefficiencies in power management, particularly in portable devices, where memory failures can lead to reduced battery runtime, increased thermal output, and compromised acoustic performance due to unnecessary power consumption from faulty memory devices.

Innovation Solution

A method is introduced to selectively disable power delivery to failed memory devices by detecting failures during initialization and boot procedures, using a power management integrated circuit (PMIC) to override power enable signals, allowing the system to conserve energy by maintaining power at the PMIC while disabling it to the faulty device, thus enabling continued operation with functional memory devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If power is continuously supplied to all memory devices, then system reliability is maintained, but energy consumption increases and battery runtime decreases

Engineering Contradiction:
Improvepower consumptionVSAvoidbattery runtime
Core Design Contradiction:
Use of energy by moving objectVSDuration of action of moving object

Solution Approach 1:

The patent extracts and isolates the faulty memory device from the power supply by disabling power delivery specifically to the failed device while maintaining power to functional memory devices. This is achieved through detecting memory failures during initialization or boot procedures and then selectively disabling power to the affected device, thereby reducing overall power consumption without impacting system reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

2Temperature

If power is supplied to failed memory devices, then power delivery is simple and continuous, but thermal output increases and acoustic performance deteriorates

Engineering Contradiction:
Improvethermal outputVSAvoidunnecessary power consumption
Core Design Contradiction:
TemperatureVSLoss of energy

Solution Approach 1:

The patent converts the harmful effect of unnecessary power consumption to failed memory devices into a beneficial outcome by implementing selective power disabling. The system detects memory failures and responds by cutting power to the faulty devices, thereby transforming what would be wasted energy and heat generation into energy conservation and thermal reduction, improving both thermal output and acoustic performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Use of energy by moving object

If power is disabled to memory devices upon failure detection, then energy is conserved, but system complexity increases due to additional power management control

Engineering Contradiction:
Improvepower consumptionVSAvoidpower management control
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the system continuously monitors memory device status during initialization and boot procedures. When a memory failure is detected, the system provides feedback by sending a disable signal to the power management integrated circuit (PMIC) to cut power to the failed device. This feedback loop enables automatic, intelligent power management that reduces consumption without requiring complex manual intervention.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11662793B2Selectively disabling power delivery to a grouping of memory devices of an information handling system
Publication Date: 2023.05.30 DELL PROD LP
  • US11662793B2 patent drawing
  • US11662793B2 patent drawing
  • US11662793B2 patent drawing

AI summary

A method of selectively disabling power delivery to a group of memory devices of an information handling system, the method including performing an initialization of a first memory device and a second memory device of the memory devices; after performing the initialization of the memory devices, performing boot procedures at the first memory device and the second memory device; while performing the boot procedures at the first memory device and the second memory device, detecting a memory failure of the first memory device; in response to detecting the memory failure of the first memory device, providing a signal to a power management integrate circuit (PMIC) of the first memory device to disable power at the first memory device; and continuing the boot procedures at the second memory device.