Processor Register Segmentation for Secure Context Switching
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Solution Overview
Problem
Existing central processing units (CPUs) face challenges in securely transitioning between execution contexts due to the wiping of registers, which disrupts the passing of variables and compromises confidentiality and integrity.
Innovation Solution
Implementing a PRESERVE instruction that allows compilers to select and preserve specific processor registers during context switches, ensuring that only designated registers are passed to the new execution context while clearing others, thereby maintaining security and integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all processor registers are cleared during context switch, then security and confidentiality are improved, but variable passing between contexts is disrupted and productivity deteriorates
Solution Approach 1:
The patent segments the processor registers into two categories: secure registers that are cleared during context switches and non-secure registers that preserve their values. This segmentation allows selective clearing of only those registers that contain sensitive information, while maintaining continuity in registers needed for variable passing, thus resolving the contradiction between security and productivity
Solution Approach 2:
The patent applies different quality attributes to different registers by marking specific registers as secure using a preserve set. Secure registers receive the property of being cleared during context switches, while non-secure registers maintain their values. This local differentiation enables targeted security measures without compromising overall system productivity
2Productivity
If a preserve set is implemented to maintain register values, then variable passing is improved, but security may be compromised if sensitive data remains in registers
Solution Approach 1:
The patent performs preliminary action by establishing a preserve set before context switches occur. The compiler or software预先 identifies which registers contain sensitive information and marks them for clearing, while other registers are marked for preservation. This preliminary classification ensures that security-sensitive data is protected while maintaining productivity for non-sensitive operations
3Reliability
If register clearing is performed during context switch, then confidentiality is improved, but execution latency increases
Solution Approach 1:
The patent applies partial action by clearing only the subset of registers identified as secure in the preserve set, rather than clearing all registers during context switches. This selective approach reduces the total number of operations required during context switching, thereby reducing latency while still maintaining confidentiality for sensitive data
Data Source
AI summary
In an example, a system includes a processor, where the processor includes a plurality of processor registers, and where the processor is configured to execute a first instruction in a first execution context. The processor is also configured to receive a PRESERVE instruction that indicates at least one processor register among the plurality of processor registers. The processor is configured to, responsive to the PRESERVE instruction, preserve parameters in the at least one processor register and clear other processor registers in the plurality of processor registers in the first execution context. The processor is also configured to execute a second instruction in a second execution context.