Selective Ruthenium Floating Gate Deposition for 3D NAND
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Solution Overview
Problem
Conventional three-dimensional NAND memories face issues with slow erase times, poor data retention, and charge spreading due to the use of silicon nitride charge storage dielectric layers, which are not as effective as low work function conducting floating gates.
Innovation Solution
The implementation of a method using atomic layer deposition (ALD) to form discrete or continuous charge storage layers, including ruthenium or RuO2, which provides better performance and data retention by being selective on oxide/poly/oxide/poly and oxide/nitride/oxide/nitride structures, and is less sensitive to temperature variations compared to chemical vapor deposition (CVD).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon nitride charge storage dielectric layers are used in three-dimensional NAND memories, then data retention is poor and erase times are slow, but using low work function conducting floating gates improves data retention and erase speed
Solution Approach 1:
The patent changes the material parameters by transitioning from silicon nitride dielectric layers to low work function conducting materials (such as ruthenium, tungsten, or titanium) for the charge storage function. This material parameter change enables both improved data retention and faster erase times by allowing efficient charge injection and extraction through the conducting floating gate structure.
Solution Approach 2:
The patent employs composite material structures where conducting floating gate materials are combined with dielectric layers to form hybrid charge storage regions. The conducting material provides efficient charge storage and fast erase capability, while the dielectric components maintain electrical isolation and structural integrity, achieving both improved reliability and reduced erase time.
2Manufacturing precision
If conventional CVD methods are used to deposit charge storage layers, then temperature variations cause deposition issues, but ALD provides better temperature stability and selectivity
Solution Approach 1:
The patent replaces the conventional CVD (Chemical Vapor Deposition) process with ALD (Atomic Layer Deposition). ALD uses sequential surface reactions with self-limiting characteristics that are less sensitive to temperature variations, providing better deposition uniformity and control. The ALD process employs alternating exposure to precursor gases that react sequentially on the substrate surface, enabling precise thickness control and improved temperature stability.
Solution Approach 2:
The ALD process uses periodic alternation between different precursor gases in a cyclic deposition sequence. Each cycle involves introducing a first precursor that reacts with the substrate surface, then introducing a second precursor that reacts with the first layer, followed by purification steps. This periodic action provides excellent thickness control and uniformity that is less sensitive to temperature fluctuations compared to continuous CVD processes.
3Reliability
If metal floating gate material is deposited on all surfaces, then metal contamination occurs on bevel and back side, but selective deposition is needed only on front side
Solution Approach 1:
The patent applies local quality by making the metal floating gate material deposition selective to specific locations (front side only) rather than uniform deposition on all surfaces. This is achieved by using ALD processes with controlled gas flow patterns and substrate positioning that limit metal precursor exposure to the front side where charge storage is needed, preventing metal contamination on bevel and back side surfaces.
Solution Approach 2:
The patent uses the ALD process itself as an intermediary mechanism to achieve selective deposition. By controlling the deposition parameters, gas flow directions, and substrate orientation during the ALD process, metal material is deposited only on the front side surfaces that require charge storage functionality, while bevel and back side surfaces remain free of metal contamination without requiring additional masking steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved endurance and data retention for NAND memory devices by using ALD to deposit discrete or continuous nanoparticle floating gates on vertical surfaces, reducing metal contamination and enhancing the performance of three-dimensional NAND memory arrays.
Implementation Method 1
A selective metal deposition process is performed, which deposits a metal material at a higher nucleation density on the second material layer than on the first material layer
Implementation Method 2
a selective metal deposition process is performed, which deposits a metal material at a higher nucleation density on the second material layer than on the first material layer
Data Source
AI summary
Undesirable metal contamination from a selective metal deposition process can be minimized or eliminated by employing a first material layer on a bevel and a back side of a substrate, while providing a second material layer only on a front side of the substrate. The first material layer and the second material layer are selected such that a selective deposition process of a metal material provides a metal material portion only on the second material layer, while no deposition occurs on the first material layer or isolated islands of the metal material are formed on the first material layer. Any residual metal material can be removed from the bevel and the back side by a wet etch to reduce or prevent metal contamination from the deposited metal material.