Selective Scan-Chain Gating for Power-Constrained IC Testing
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Solution Overview
Problem
Scan-chain testing in integrated circuit devices faces challenges with resource constraints such as high power consumption and data congestion, leading to increased testing costs due to unnecessary gating of all scan-chain paths, which reduces test efficiency and power consumption.
Innovation Solution
Implementing a method to selectively gate only scan-chain paths with resource constraints, using a low-power testing controller and logic gates to apply individual or grouped switching factors, reducing data propagation rates without affecting unconstrained paths, and optionally compressing and decompressing scan-chain data patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If gating is applied to reduce power consumption during scan-chain testing, then power consumption is reduced, but scan pattern efficiency decreases and the number of scan chain patterns required increases
Solution Approach 1:
The patent applies gating selectively to specific scan-chain paths based on their individual resource constraints rather than uniformly gating all paths. Each scan-chain path is analyzed for power consumption and data congestion characteristics, and gating is applied only where needed, creating local quality differences in the testing system.
2Loss of energy
If gating is applied to reduce power consumption, then power consumption is reduced, but scan-chain paths that are not resource-constrained are unnecessarily gated
Solution Approach 1:
The system evaluates each scan-chain path individually to determine resource constraints, then applies gating only to paths that meet specific criteria. This selective approach ensures that unconstrained paths continue to operate without unnecessary gating, maintaining system adaptability and testing efficiency.
3Loss of energy
If a switching factor is applied to gate or throttle scan-chain propagation, then power consumption is reduced, but the rate of scan-chain data propagation decreases
Solution Approach 1:
The patent applies gating partially, only to the extent necessary for resource-constrained paths. The switching factor is adjusted based on the specific resource constraints of each path, applying just enough throttling to achieve power reduction while minimizing the impact on propagation speed. This partial action approach avoids excessive gating that would unnecessarily slow down the testing process.
Data Source
AI summary
A method of scan-chain testing of an integrated circuit device having a plurality of respective scan-chain paths, at least some of the respective scan-chain paths being designated as having resource constraints, includes propagating a respective scan-chain data pattern through each of the respective scan-chain paths, and gating each respective scan-chain path designated as having resource constraints, to reduce a rate of scan-chain data propagation through the respective scan-chain path, without gating any scan-chain path not designated as having resource constraints. Scan-chain paths may be designated as having resource constraints because of high power consumption or data congestion.