Selective Silicidation of Gate Electrodes in Semiconductor Devices
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Solution Overview
Problem
The increasing density variations of MIS transistors in semiconductor integrated circuits lead to dimension differences in gate electrodes, causing process variations and potential short circuits due to the silicidation of gate and dummy gate electrodes, which complicates the fabrication and reliability of semiconductor devices.
Innovation Solution
A semiconductor device structure where the dummy gate electrodes are not silicided, preventing them from expanding and short-circuiting with the silicided gate electrodes, and a fabrication method that selectively silicides only the gate electrodes while keeping the dummy gate electrodes non-silicided, ensuring high yield and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicidation is applied to both gate electrodes and dummy gate electrodes to reduce resistance, then electrical conductivity is improved, but short circuits occur between adjacent gate and dummy gate electrodes due to expansion
Solution Approach 1:
The patent applies different treatments to different regions: silicidation is applied only to gate electrodes that require electrical conductivity, while dummy gate electrodes are excluded from silicidation to prevent expansion and short circuits. This selective application of silicidation based on functional requirements resolves the contradiction between improving conductivity and preventing harmful short circuits.
2Productivity
If dimensions of gate electrodes are reduced to increase integration density, then productivity is improved, but control precision of silicide formation deteriorates
Solution Approach 1:
The patent uses selective masking to create different conditions for different regions. By placing masks over dummy gate electrodes during silicidation, the process achieves precise local control: silicide forms on functional gate electrodes while dummy electrodes remain protected. This enables continued miniaturization while maintaining manufacturing precision through localized process control.
3Manufacturing precision
If dummy gate electrodes are uniformly formed to suppress process variations, then manufacturing precision is improved, but device complexity increases due to additional structures
Solution Approach 1:
The patent extracts the problematic property (silicidation) from dummy gate electrodes while retaining their beneficial function (suppressing process variations). By selectively preventing silicide formation on dummy electrodes through masking, the patent eliminates the harmful expansion effect while preserving the dummy electrodes' role in maintaining uniform processing conditions across the wafer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents short circuits between gate and dummy gate electrodes, enhances the reliability and performance of semiconductor devices by controlling the silicide formation, and allows for the miniaturization of semiconductor devices with reduced contact resistance.
Implementation Method 1
at least an upper part of the gate electrode being silicided
Data Source
AI summary
The following steps are carried out: forming a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween, forming a dummy gate electrode on the semiconductor substrate with a dummy gate insulating film interposed therebetween and forming another dummy gate electrode on the semiconductor substrate with an insulating film for isolation interposed therebetween; forming a metal film on the semiconductor while exposing the gate electrode and covering the dummy gate electrodes; and subjecting the semiconductor substrate to heat treatment and thus siliciding at least an upper part of the gate electrode. Since the gate electrode is silicided and the dummy gate electrodes are non-silicided, this restrains a short circuit from being caused between the gate electrode and adjacent one of the dummy gate electrodes.