Area-Selective Silicon Oxide ALD for Precise 3D Device Patterning

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional top-down lithography and etching processes face limitations in achieving uniformity and precision for high-aspect-ratio and high-integration three-dimensional electronic devices, such as V-NAND, leading to non-uniformity and operation errors.

Innovation Solution

An area-selective deposition method using atomic layer deposition (ALD) is employed, where a substrate with silicon oxide and silicon nitride areas undergo surface treatment to form specific functional groups, allowing selective deposition of a silicon dioxide layer using an aminosilane-based precursor and oxygen-containing sources, with optional reaction inhibitors, to overcome the limitations of conventional deposition methods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional top-down lithography and etching processes are used for high-aspect-ratio three-dimensional structures, then device integration is achieved, but manufacturing precision and uniformity deteriorate due to non-uniform deposition and etching

Engineering Contradiction:
Improvedevice integrationVSAvoiddeposition uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies area-selective deposition by functionalizing different regions of the substrate surface with distinct chemical groups (carboxyl groups on first substrate area, hydroxyl groups on second substrate area). This enables the precursor to react selectively with specific surface regions, achieving localized film formation with high precision while maintaining overall device integration. The local chemical property differentiation resolves the contradiction between productivity and manufacturing precision.

Inventive Principle:
Principle #3Local quality

2Productivity

If conventional top-down lithography is used for scaling, then device integration increases, but patterning precision deteriorates due to interference problems and operation errors

Engineering Contradiction:
Improvedevice integrationVSAvoidpatterning precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent performs preliminary surface functionalization before deposition, where carboxyl and hydroxyl groups are pre-formed on different substrate areas through surface treatment. This preliminary chemical preparation enables subsequent selective precursor adsorption and reaction, achieving precise patterning without the interference problems associated with conventional lithography scaling. The preliminary action of surface functionalization resolves the contradiction between device integration and patterning precision.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the degree of freedom in patterning and deposition for three-dimensional structures, enabling the fabrication of high-aspect-ratio and high-integration devices like V-NAND with improved precision and uniformity, extending the integration process capabilities.

Implementation Method 1

The aminosilane based silicon precursor may be selectively adsorbed to the first functional group among the first functional group and the second functional group to form SiH3 on the silicon oxide area

Methodology Applied
Scientific EffectChemical adsorption: Adsorption

Implementation Method 2

a second supplying step of supplying an oxygen-containing source into the chamber

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS12116667B2Method of area-selective deposition and method of fabricating an electronic device using the same
Publication Date: 2024.10.15 SK HYNIX INC
  • US12116667B2 patent drawing
  • US12116667B2 patent drawing
  • US12116667B2 patent drawing

AI summary

An area-selective deposition method may include providing a substrate structure including a silicon oxide area and a silicon nitride area; performing a surface treatment on the silicon oxide area and the silicon nitride area of the substrate structure to form a first functional group on a surface of the silicon oxide area and to form a second functional group on a surface of the silicon nitride area; and performing an atomic layer deposition (ALD) process in a chamber in which the substrate structure is disposed, to selectively form a silicon oxide layer on the silicon oxide area among the silicon nitride area and the silicon oxide area. The ALD process may include: supplying an aminosilane-based silicon precursor into the chamber; purging the chamber with a first purge gas; supplying an oxygen-containing source into the chamber; and purging the chamber with a second purge gas.