Selective Slow Programming for Weak Memory Word Lines
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Solution Overview
Problem
Non-uniform voltage threshold and error/failure characteristics among word lines in memory dies lead to performance and reliability issues, with weak word lines causing excessive read recoveries and potential data unrecoverability.
Innovation Solution
Implementing slow programming operations on identified weak word lines based on performance metrics, such as failed bit count, to reduce performance concerns and increase reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If slow programming operations are applied to weak word lines, then reliability is improved, but latency increases and performance consistency deteriorates
Solution Approach 1:
The patent applies slow programming operations selectively only to identified weak word lines rather than uniformly across all word lines. The controller identifies weak word lines based on voltage threshold characteristics and error rates, then applies different programming speeds to different word lines, achieving improved reliability for problematic lines while maintaining normal performance for healthy lines.
2Reliability
If slow programming operations are applied to weak word lines, then reliability is improved, but performance consistency deteriorates
Solution Approach 1:
The system maintains performance consistency by applying slow programming operations only locally to weak word lines that meet specific criteria, while the majority of word lines continue to operate at normal programming speeds. This localized approach ensures that overall memory device performance remains consistent while addressing reliability issues in specific problematic areas.
Solution Approach 2:
The patent implements dynamic programming operations where the programming speed is adjusted based on real-time identification of weak word lines. The controller can switch between normal and slow programming modes depending on which word lines are being accessed, allowing the system to adapt its performance characteristics to current operational needs while maintaining overall consistency.
3Loss of time
If selective slow programming is implemented, then latency costs are minimized, but device complexity increases
Solution Approach 1:
The patent performs preliminary identification and characterization of weak word lines during manufacturing or initial operation, storing this information in a lookup table or database. This preliminary action allows the controller to quickly determine whether slow programming is needed without performing complex real-time analysis, thereby minimizing latency overhead while managing device complexity through pre-computed data structures.
Data Source
AI summary
A slow programming audit is performed on one or more memory blocks and/or associated word lines of one or more memory dies. The slow programming audit is used to determine whether identified or known weak word lines of one or more memory dies are causing performance issues. If it is determined that the weak word lines are causing data read, data write and/or data retention issues, the weak word lines of the one or more memory dies are marked for slow programming in subsequent programming operations.