Selective Stress Engineering for Mixed-Signal LSI Devices
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Solution Overview
Problem
Mechanical stress engineering in MOS transistors improves carrier mobility but degrades flicker noise characteristics, making it unsuitable for applications requiring low noise, such as analog and RF circuits.
Innovation Solution
Selective application of tensile and compressive stress to different portions of semiconductor devices based on their operational modes, such as digital or analog modes, using stress control layers and silicidation processes to optimize performance while minimizing noise impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If mechanical stress engineering is applied to MOS transistor channel region, then carrier mobility is improved and switching performance is enhanced, but flicker noise is degraded
Solution Approach 1:
The patent applies different stress conditions to different regions of the MOS device. Specifically, stress control layers are selectively positioned to apply mechanical stress only to the channel region to improve carrier mobility, while source and drain regions are designed with different stress states (e.g., through selective silicidation or stress control layer placement) to minimize flicker noise generation. This local differentiation allows simultaneous optimization of switching performance and noise characteristics.
2Speed
If stress control layers are formed to apply mechanical stress to improve device performance, then carrier mobility increases, but manufacturing complexity increases
Solution Approach 1:
The patent integrates stress control layer formation with existing manufacturing processes. The stress control layers are formed using standard deposition techniques (such as PECVD or LPCVD) that are already part of the CMOS fabrication process flow. By combining the stress application function with existing process steps rather than adding entirely new process modules, the patent achieves performance improvement while limiting increases in manufacturing complexity.
3Speed
If silicide layers are formed in source/drain regions to introduce tensile stress, then carrier mobility is improved, but device volume increases
Solution Approach 1:
The patent optimizes the stress state in source and drain regions by controlling the formation and properties of silicide layers. Through parameter adjustments such as silicide thickness, composition, and formation conditions, the patent achieves the desired tensile stress in the channel region while minimizing the volume occupied by silicide material in source and drain regions. This allows mobility improvement without significant penalty in device footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances device performance by applying stress only where needed while reducing flicker noise effects, thereby improving overall circuit performance in mixed-signal applications.
Implementation Method 1
Mechanical stress engineering has been employed in MOS transistors to improve carrier mobility. Tensile stress on a channel region causes increased current in an NMOS transistor
Implementation Method 2
After silicidation, the silicide regions 30 occupy less volume than the original source/drain material replaced by the silicide. As a result, tensile stress is introduced into the channel 18.
Data Source
AI summary
In semiconductor devices in which both NMOS devices and PMOS devices are used to perform in different modes such as analog and digital modes, stress engineering is selectively applied to particular devices depending on their required operational modes. That is, the appropriate mechanical stress, i.e., tensile or compressive, can be applied to and/or removed from devices, i.e., NMOS and/or PMOS devices, based not only on their conductivity type, i.e., n-type or p-type, but also on their intended operational application, for example, analog/digital, low-voltage/high-voltage, high-speed/low-speed, noise-sensitive/noise-insensitive, etc. The result is that performance of individual devices is optimized based on the mode in which they operate. For example, mechanical stress can be applied to devices that operate in high-speed digital settings, while devices that operate in analog or RF signal settings, in which electrical noise such as flicker noise that may be introduced by applied stress may degrade performance, have no stress applied.