Selective Super Chip Kill for NAND Flash Data Recovery
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Solution Overview
Problem
Conventional memory systems face challenges in efficiently recovering data from failed codewords in NAND flash memory due to bitline failures, where prior chipkill schemes struggle to accurately recover data when multiple codewords fail, leading to reduced reliability and increased latency.
Innovation Solution
The implementation of a super chip kill (SCK) operation in a memory system, where the memory controller decodes codewords, estimates raw bit error rates, sorts failed codewords by probability of successful decoding, and performs a selective SCK operation on the most likely recoverable codewords to produce a recovered codeword, enhancing data recovery capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional chipkill schemes are used to recover data from failed codewords, then data recovery is attempted, but the reliability of recovery decreases and latency increases when multiple codewords fail
Solution Approach 1:
The patent segments the recovery process into distinct phases: first attempting to recover individual failed codewords using conventional chipkill, and only if that fails, then attempting recovery of the entire sector. This segmentation allows the system to handle simple failures efficiently while reserving complex resources for difficult multi-codeword failures, thereby improving overall reliability without excessive latency penalty.
Solution Approach 2:
The patent performs preliminary actions by first attempting individual codeword recovery before proceeding to sector-level recovery. This preliminary sorting of recovery attempts by complexity and success probability ensures that easier recoveries are completed quickly, reducing average latency, while more complex recoveries are attempted only when necessary, maintaining high reliability.
2Ease of operation
If all failed codewords are treated equally in recovery operations, then processing is simplified, but the probability of successful decoding decreases for codewords with higher error rates
Solution Approach 1:
The patent applies local quality by differentiating the recovery approach based on the specific characteristics of each failed codeword. Instead of uniform treatment, the system estimates raw bit error rates for each codeword and selects recovery methods accordingly - using conventional chipkill for low-error codewords and reserving advanced techniques for high-error cases. This localized differentiation maintains operational simplicity while significantly improving decoding success probability.
Solution Approach 2:
The patent changes the parameter of recovery strategy selection based on estimated raw bit error rates. By using the RBER as a selection criterion, the system dynamically adjusts the recovery approach - simpler methods for low RBER codewords and more complex methods for high RBER codewords. This parameter-driven approach balances processing simplicity with decoding success probability.
3Reliability
If conventional error correction codes are used, then data protection is provided, but the ability to recover from multiple simultaneous failures is insufficient
Solution Approach 1:
The patent implements multi-functionality by creating a universal recovery mechanism that handles multiple failure scenarios through a single integrated approach. The system can recover from single codeword failures, multiple codeword failures, and sector-level failures using the same high-level framework that estimates RBERs and selects appropriate recovery methods. This universal approach significantly enhances adaptability while maintaining strong error correction capability.
Solution Approach 2:
The patent introduces dynamics by making the recovery strategy adaptive rather than static. The system dynamically estimates the raw bit error rate for each failed codeword and uses this information to dynamically select the most appropriate recovery method. This dynamic adaptation allows the system to handle a wide range of failure conditions effectively, improving both reliability and versatility.
Data Source
AI summary
A memory system having a memory block and a memory controller in communication with the memory block. The memory controller is configured to: decode codewords from the memory block, identify failed codewords from the decoded codewords, estimate raw bit errors RBERs of the failed codewords, sort failed codewords from a failed sector of the memory block in order from a first set of the failed codewords in the failed sector having a higher probability of being successfully decoded to a second set of the failed codewords in the failed sector having a lower probability of being successfully decoded, and perform a super chip kill SCK operation on one of the failed codewords in the first set to produce a recovered codeword.