Selective TLB Purging via Bitmask Tracking for Virtual Processor Migration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In computing environments that support virtualization, the process of purging translation look-aside buffers (TLBs) when a virtual processor is moved from one physical processor to another is costly in terms of performance, leading to system degradation due to unnecessary TLB misses and increased overhead.
Innovation Solution
Implementing a selective purging mechanism that uses a bitmask to track which physical processors have already performed a local TLB purging operation, thereby refraining from unnecessary purges and reducing the need for TLB refreshes, especially when a virtual processor is dispatched to a new physical processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a TLB purging operation is performed every time a virtual processor is dispatched to a new physical processor, then address translation correctness is ensured, but system performance deteriorates due to increased TLB misses and purging overhead
Solution Approach 1:
The patent applies local quality by differentiating the purging behavior based on the specific physical processor involved. Instead of uniformly purging the TLB for all processor transitions, the system tracks which physical processors have already performed purging operations and selectively avoids redundant purges. This localized differentiation resolves the contradiction by maintaining correctness where needed while eliminating performance-degrading redundant operations.
Solution Approach 2:
The patent changes the parameter of purging frequency from a fixed value (purge every transition) to a dynamic value determined by tracking structure state. The bitmask tracking structure records which processors have performed purges, and this state information dynamically controls whether subsequent purges occur. This parameter change resolves the contradiction by adapting the purging behavior to actual system state rather than following a rigid policy.
2Reliability
If TLB purging is performed frequently to ensure address translation accuracy, then translation correctness is maintained, but time consumption increases due to repeated purging operations
Solution Approach 1:
The patent applies preliminary action by performing the purging operation only once when a virtual processor is first dispatched to a physical processor, and recording this in the tracking structure. Subsequent dispatches to the same processor skip the purge operation since it was already performed preliminarily. This preliminary purging approach maintains translation correctness while eliminating redundant time-consuming purges during processor migration.
3Reliability
If the TLB purging operation is performed on every physical processor transition, then address mapping accuracy is ensured, but processing overhead increases
Solution Approach 1:
The patent extracts the redundant purging operations from the mandatory dispatch process by introducing a separate tracking mechanism. The bitmask tracking structure identifies and extracts only the necessary purge operations, separating them from routine dispatch operations. This extraction resolves the contradiction by removing unnecessary processing overhead while preserving the essential address mapping accuracy function.
Data Source
AI summary
Selective purging of a structure associated with address translation, such as a translation look-aside buffer. When purging of entries of a structure relating to a virtual processor executing on a physical processor is requested, it is determined whether the physical processor may refrain from such purging. A check is made as to whether purging has previously been performed on this physical processor for this virtual processor, and if so, the physical processor may refrain from purging.