Selective Via Barrier Metallization for Low-Resistance Interconnects
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Solution Overview
Problem
The challenge in integrated circuit (IC) manufacturing is to reduce the resistance of vias while maintaining high reliability, especially in narrow features where conventional methods struggle to achieve low resistance and high reliability simultaneously.
Innovation Solution
The method involves forming an electronic device by providing a substrate with an insulating layer and a first metallization layer, depositing a metal layer in the opening extending from the top surface of the insulating layer to the first metallization layer, selectively depositing a barrier layer on the sidewalls of the opening and not on the metal layer, and forming a second metallization layer on the metal layer and the barrier layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional metallization processes are used, then manufacturing simplicity is maintained, but via resistance remains high and reliability is compromised in narrow features
Solution Approach 1:
The via structure is segmented into multiple functional layers: a first metallization layer at the bottom, an intermediate layer with selective barrier deposition on sidewalls only, and a second metallization layer on top. This segmentation allows different regions of the via to have optimized properties - the bottom portion maintains good adhesion and conductivity, while the sidewalls provide barrier functionality without compromising the conductive path.
Solution Approach 2:
The barrier layer is applied selectively only to the sidewalls of the via opening, not to the entire via surface. This local quality approach ensures that the barrier function is provided where needed (sidewalls) while leaving the top and bottom surfaces optimized for electrical conductivity and adhesion, thus reducing overall via resistance while maintaining reliability.
2Productivity
If via size is reduced for higher density, then device integration is improved, but via resistance increases and reliability decreases
Solution Approach 1:
By applying the barrier layer selectively to sidewalls and not to the top/bottom surfaces, the invention optimizes the local properties of each region. The top and bottom surfaces maintain low resistance for vertical current flow, while sidewalls provide necessary barrier functionality. This allows via dimensions to be reduced for higher density without proportionally increasing resistance.
Solution Approach 2:
The invention transitions from a conventional planar barrier deposition to a three-dimensional selective deposition where the barrier layer is positioned only on the vertical sidewalls. This dimensional approach separates the barrier function (sidewalls) from the conductive function (top/bottom surfaces), enabling better performance in scaled-down via structures.
3Reliability
If barrier layer is deposited on the entire via surface, then adhesion and diffusion barrier are improved, but via resistance increases
Solution Approach 1:
The barrier layer is deposited with spatial selectivity - present on sidewalls for adhesion and diffusion barrier, but absent from top and bottom surfaces to minimize resistance. This local quality differentiation resolves the contradiction by providing barrier functionality only where it is needed for reliability, while maintaining optimal electrical properties in the current conduction paths.
Solution Approach 2:
The via structure is divided into functional zones: barrier-required zones (sidewalls) and conductivity-optimized zones (top and bottom surfaces). The segmented barrier deposition strategy ensures that each zone receives the appropriate treatment, achieving both adhesion/diffusion protection and low resistance without compromise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces via resistance while maintaining high reliability, achieving a via resistance reduction of greater than or equal to 20% compared to traditional methods.
Implementation Method 1
depositing a metal layer in the bottom portion of the opening, the metal layer extending to the first metallization layer
Implementation Method 2
selectively depositing a barrier layer on the at least one sidewall of the opening and not on the metal layer
Data Source
AI summary
Provided are methods of forming vias with decreased resistance by selectively depositing a barrier layer on an insulating layer and not on a metallic surface. Some embodiments of the disclosure utilize a planar hydrocarbon to form a blocking layer on metallic surfaces. Deposition is performed to selectively deposit on the unblocked insulating surfaces.