Selective Via Metallization for Low Resistance and Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In integrated circuit manufacturing, reducing via resistance is critical for improved performance, but existing methods struggle to effectively minimize via resistance while maintaining high reliability, especially in narrow features.
Innovation Solution
A method involving selective deposition of a barrier layer on insulating layers over metal layers, combined with a blocking layer to control nucleation and growth, is used to form low-resistance metal vias through a process that includes atomic layer deposition and etching, allowing for precise control of metal layer formation without breaking vacuum.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional planar process is used to manufacture interconnect structure, then manufacturing simplicity is maintained, but via resistance cannot be effectively reduced
Solution Approach 1:
The via formation process is segmented into distinct stages: initial metal layer deposition in the bottom portion, selective barrier layer deposition on sidewalls, and second metal layer deposition in the top portion. This segmentation allows each stage to be optimized independently for resistance reduction while maintaining process control
Solution Approach 2:
Different regions of the via structure are assigned different materials and properties: the bottom portion receives a metal layer for electrical connection, the sidewalls receive a barrier layer for diffusion prevention, and the top portion receives a second metal layer for low resistance. This local differentiation optimizes each region's function to collectively reduce via resistance
2Reliability
If metal lines are spaced closer to reduce IC size, then device miniaturization is achieved, but via resistance increases and reliability decreases
Solution Approach 1:
The invention changes the physical and chemical parameters of the via structure by implementing a multi-layer composition with different materials (metal and barrier layers) in specific configurations. This parameter optimization reduces resistance without increasing the physical via dimensions, enabling reliable performance in miniaturized ICs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces via resistance while maintaining high reliability, achieving a via resistance reduction of greater than 20% compared to traditional methods, and allows for the formation of low-resistance metal vias with improved integrity and reliability.
Implementation Method 1
a method involving selective deposition of a barrier layer on insulating layers over metal layers, combined with a blocking layer to control nucleation and growth, is used to form low-resistance metal vias through a process that includes atomic layer deposition and etching
Data Source
AI summary
Provided are methods of forming vias with decreased resistance by selectively depositing a barrier layer on an insulating layer and not on a metallic surface. Some embodiments of the disclosure utilize a planar hydrocarbon to form a blocking layer on metallic surfaces. Deposition is performed to selectively deposit on the unblocked insulating surfaces.