Selectively Combinable Directional Shifters for Variable Width Data
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Solution Overview
Problem
Existing digital electronic circuitry faces challenges in efficiently manipulating binary data bits due to the need for shifters of varying sizes, which increases circuit size, power consumption, and cost, particularly in mobile computing where compactness and efficiency are crucial.
Innovation Solution
A selectively combinable shifter apparatus that allows multiple shifters to be cascaded or configured to operate on different word sizes, enabling the handling of binary numbers of varying widths, thereby reducing hardware requirements and allowing for flexible shift directions, including left and right shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple shifters of different sizes are implemented to handle various data word sizes, then the system can operate on different data widths (8-bit, 16-bit, 32-bit), but the circuit size, power consumption, and cost increase
Solution Approach 1:
The shifter circuit is designed with universal functionality to handle multiple data word sizes (8-bit, 16-bit, 32-bit) using the same hardware structure. The circuit can be configured through control signals to operate on different data widths without requiring separate dedicated shifters for each size, thereby reducing overall circuit area while maintaining adaptability.
Solution Approach 2:
The shifter circuit is segmented into modular stages that can be selectively activated. The circuit includes multiple shifter stages with control logic that enables or disables specific stages based on the required data word size, allowing the same physical circuit to function as different-sized shifters dynamically.
2Adaptability or versatility
If multiple shifters of different sizes are implemented to handle various data word sizes, then the system can operate on different data widths, but power consumption increases
Solution Approach 1:
The shifter circuit is segmented into modular stages that can be selectively activated. The circuit includes multiple shifter stages with control logic that enables or disables specific stages based on the required data word size, allowing the same physical circuit to function as different-sized shifters dynamically.
Solution Approach 2:
Different portions of the shifter circuit are activated based on the specific operation required. When handling 8-bit data, only the relevant 8-bit portion of the circuit is active, while the rest remains inactive, thereby reducing power consumption proportionally to the actual data width being processed.
3Device complexity
If fixed-size shifters are used, then the circuit design is simpler, but the system cannot efficiently handle multiple data word sizes
Solution Approach 1:
The shifter circuit is designed with universal functionality to handle multiple data word sizes (8-bit, 16-bit, 32-bit) using the same hardware structure. The circuit can be configured through control signals to operate on different data widths without requiring separate dedicated shifters for each size, thereby reducing overall circuit area while maintaining adaptability.
Solution Approach 2:
The shifter circuit incorporates dynamic configuration capability where the circuit structure can be reconfigured at runtime based on control signals. This allows the same physical circuit to dynamically adapt its effective size and operation mode to match the required data word size, providing versatility without requiring multiple fixed-size circuits.
Data Source
AI summary
An apparatus for mathematical manipulation is described allowing the selective combination of shifters to shift binary numbers of various widths. Selective combination allows on-the-fly adjustment of shifters from independent to coordinated shifting operations. Selective combination allows adjustable hardware-based shifting while saving space and resources. Multiple eight-bit shifters can be configured for a variety of operand widths, such as a 32-bit width, a 24-bit width, a 16-bit width, or an eight-bit width. Multiplexers route the appropriate input data to the appropriate shifters. Bidirectional shifting is configured through a selector tree, including both shift left and shift right operations. Opcodes configure the shifters for the desired type of shift and a shifted result is generated.


