Selectively Doped JFET Regions for Power Semiconductor Devices
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Solution Overview
Problem
Conventional power semiconductor devices, such as MOSFETs and IGBTs, face challenges with high on-resistance due to the absence of minority carrier injection, leading to limited forward current density and increased electrical fields in the off-state, which can damage gate insulation layers and reduce voltage blocking capabilities.
Innovation Solution
The introduction of selectively doped wide band-gap JFET regions with local JFET regions having higher doping concentrations adjacent to well regions, reducing the central JFET region's doping concentration to lower the electrical field and enhance voltage blocking, while maintaining current density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the JFET region has high doping concentration to reduce on-resistance, then forward current density improves, but electrical field in off-state increases causing gate insulation damage
Solution Approach 1:
The patent applies local quality by creating two distinct doping regions within the JFET: a first region with higher doping concentration adjacent to the channel for current conduction, and a second region with lower doping concentration for voltage blocking. This spatial differentiation of doping concentrations allows each sub-region to optimize its local function, resolving the contradiction between reducing on-resistance and limiting off-state electrical field.
2Reliability
If the drift region has low doping concentration to reduce on-resistance, then forward current density improves, but voltage blocking capability decreases
Solution Approach 1:
The patent differentiates the JFET into two doping regions where the second region (with lower doping concentration) specifically addresses voltage blocking, while the first region (with higher doping concentration) handles current conduction. This local differentiation allows the device to achieve both low on-resistance and high voltage blocking capability simultaneously.
Solution Approach 2:
The JFET region is segmented into two functional zones with different doping concentrations. The segmentation allows independent optimization of current conduction path (first region) and voltage blocking region (second region), resolving the contradiction between these two opposing requirements.
3Reliability
If uniform doping is used in the JFET region, then manufacturing is simplified, but reverse leakage current increases
Solution Approach 1:
The patent employs local quality by implementing non-uniform doping concentrations in different regions of the JFET. The higher doping concentration in the first region and lower doping concentration in the second region work together to reduce reverse leakage current while maintaining manufacturability through selective doping processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces reverse leakage current, improves device stability, and enhances voltage blocking capabilities by merging depletion regions deeper within the device layer structure, and provides a non-destructive avalanche current path, making the devices more robust against avalanche events.
Implementation Method 1
reducing the central JFET region's doping concentration to lower the electrical field and enhance voltage blocking
Implementation Method 2
current conduction occurs solely through majority carrier transport
Implementation Method 3
high on-resistance due to the absence of minority carrier injection
Implementation Method 4
an n-type MOSFET turns on when a gate bias voltage is applied that is sufficient to create a conductive n-type inversion layer in a p-type channel region
Implementation Method 5
enhances voltage blocking capabilities by merging depletion regions deeper within the device layer structure
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
Semiconductor switching devices include a wide band-gap drift layer having a first conductivity type (e.g., n-type), and first and second wide band-gap well regions having a second conductivity type (e.g., p-type) on the wide band-gap drift layer. First and second wide band-gap source/drain regions of the first conductivity type are on the first and second wide band-gap well regions, respectively. A wide band-gap JFET region having the first conductivity type is provided between the first and second well regions. This JFET region includes a first local JFET region that is adjacent a side surface of the first well region and a second local JFET region that is adjacent a side surface of the second well region. The local JFET regions have doping concentrations that exceed a doping concentration of a central portion of the JFET region that is between the first and second local JFET regions of the JFET region.