Self-Adaptive Path Analysis for Accurate IC Timing
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Solution Overview
Problem
Existing electronic design automation (EDA) tools face challenges in accurately and efficiently performing static timing analysis, leading to repetitive loops of engineering change orders due to over-fixing or under-fixing timing violations, which are costly and time-consuming, especially in complex integrated circuit designs.
Innovation Solution
Implement a self-adaptive, infinite depth, path-based analysis that includes a clock period identification process, endpoint violation level analysis, and an adaptive learning engine to generate a more accurate timing database by selectively applying path-based analysis on critical zones, reducing false positives and optimizing the design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If static timing analysis is performed using conventional EDA tools, then timing violations can be identified, but false positives occur leading to over-fixing or under-fixing
Solution Approach 1:
The patent implements a self-adaptive analysis system that dynamically adjusts the depth and scope of path-based analysis based on violation severity. The system transitions from static analysis to adaptive analysis, where the analysis parameters change based on real-time assessment of endpoint violations, thereby improving accuracy while maintaining stability.
Solution Approach 2:
The system changes analysis parameters (depth, scope, methodology) based on the detected violation characteristics. For high-level violations, it performs full-depth path-based analysis, while for minor violations, it uses shallower analysis, thus adapting the measurement precision to the actual problem severity and reducing false positives.
2Measurement precision
If full depth path based analysis is performed on entire design, then timing accuracy is improved, but computational complexity and time increase
Solution Approach 1:
The patent applies path-based analysis selectively to specific zones and endpoints rather than uniformly across the entire design. By identifying critical zones with high-level violations and concentrating analysis resources there, the system achieves high timing accuracy where needed while avoiding unnecessary complexity in other regions.
Solution Approach 2:
The design is divided into multiple zones and analysis depths. The system segments the analysis task by creating different analysis levels (full depth, partial depth) and applying them to different regions based on violation severity, thereby managing computational complexity through hierarchical decomposition.
3Productivity
If conventional timing analysis is used, then analysis speed is maintained, but repetitive engineering change orders occur due to over-fixing or under-fixing
Solution Approach 1:
The system implements feedback mechanisms where analysis results from initial conventional timing analysis inform subsequent path-based analysis. The adaptive learning engine uses feedback from detected violations to adjust analysis parameters and focus subsequent iterations on critical paths, reducing repetitive engineering change orders by ensuring more accurate initial assessments.
Solution Approach 2:
The system performs preliminary conventional timing analysis to identify potential violations before committing to full-depth path-based analysis. This preliminary action filters out minor issues that don't require intensive analysis, allowing the system to focus computational resources on critical violations and avoid unnecessary iterative cycles.
Data Source
AI summary
The present disclosure relates to a system and method for electronic design automation. Embodiments may include loading one or more libraries, netlists, or constraints associated with an electronic design and loading parasitic data associated with the electronic design. Embodiments may further include performing a self adaptive, infinite depth, path based analysis on at least a portion of the electronic design. Embodiments may also include analyzing the electronic design based upon, at least in part, the self adaptive, infinite depth, path based analysis.