Self-Aligned Backside Contacts Without Deep Placeholders

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional methods for forming backside contacts in nanosheet transistor structures face challenges such as damage to the gate hard mask, spacer loss, and high aspect ratio patterning, which can lead to gate bending or collapse, necessitating a solution that avoids deep placeholders under source drain regions.

Innovation Solution

The semiconductor structure employs self-aligned backside contacts by using a buffer layer to separate source drain regions from the backside dielectric layer, allowing for contact formation without deep placeholders, and includes a bottom dielectric isolation layer to separate nanosheet stacks from the backside dielectric layer, enabling direct contact of source drain regions with the backside dielectric layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If deep placeholders are used under source drain regions for backside contact formation, then contact alignment is improved, but gate damage and spacer loss occur

Engineering Contradiction:
Improvecontact alignmentVSAvoidgate damage and spacer loss
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The buffer layer is formed in advance before source drain region formation, creating a protective structure that prevents gate damage and spacer loss during subsequent processing steps. This preliminary protective measure eliminates the need for deep placeholders while maintaining contact alignment precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The buffer layer acts as an intermediary between the source drain regions and the underlying structure, providing mechanical support and protection during contact formation. This intermediary layer enables precise contact alignment without requiring deep placeholders that would cause gate damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If self-aligned backside contacts are formed without deep placeholders, then gate integrity is improved, but contact formation complexity increases

Engineering Contradiction:
Improvegate integrityVSAvoidcontact formation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer layer is formed to self-align with the source drain regions through conformal deposition, automatically providing the necessary structural support and alignment without requiring additional complex processing steps. This self-aligning mechanism maintains gate integrity while simplifying the overall contact formation process.

Inventive Principle:
Principle #25Self-service

3Reliability

If buffer layer is introduced to separate source drain regions from backside dielectric, then contact reliability is improved, but device structure complexity increases

Engineering Contradiction:
Improvecontact reliabilityVSAvoiddevice structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer layer serves multiple functions simultaneously: it provides mechanical support during contact formation, enables self-alignment of backside contacts, protects the gate structure, and facilitates reliable electrical contact. This multi-functionality improves contact reliability without proportionally increasing device structure complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240413214A1Self aligned backside contact
Publication Date: 2024.12.12 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240413214A1 patent drawing
  • US20240413214A1 patent drawing
  • US20240413214A1 patent drawing

AI summary

A semiconductor structure including first source drain regions and second source drain regions arranged above a backside dielectric layer, and a buffer layer physically separating at least one of the second source drain regions from the backside dielectric layer, where at least one of the first source drain regions is in direct contact with the backside dielectric layer.