Self-Aligned Backside Via Formation Without Deep Trench Etching
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Solution Overview
Problem
Existing backside via formation processes for semiconductor devices face challenges in forming self-aligned vias without deep trench etching, which is difficult for reduced pitch semiconductor devices.
Innovation Solution
A method for forming a self-aligned backside via without forming a deep trench in the source/drain region, involving the formation of a shallow trench, a sacrificial semiconductor feature, and a source/drain feature, followed by etching processes to form the backside via.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If existing backside via formation processes are used, then via formation is achieved, but deep trench etching is required which is difficult for reduced pitch semiconductor devices
Solution Approach 1:
The method performs preliminary actions by forming the shallow trench and sacrificial semiconductor feature before final via formation. The sacrificial feature is deposited and patterned in advance to define the via location, enabling self-alignment without requiring deep trench etching through the entire substrate thickness.
Solution Approach 2:
The via formation process is segmented into multiple steps: forming a shallow trench (not through the entire substrate), depositing sacrificial material, patterning the sacrificial feature, selectively removing it, and finally forming the via. This segmentation avoids the need for a single deep trench etch through the whole substrate.
2Reliability
If deep trench etching is performed to form backside vias, then via formation is achieved, but the photolithography process window is reduced
Solution Approach 1:
The approach transitions from vertical deep trench etching to a combination of shallow trench formation and lateral sacrificial feature removal. By using the sacrificial semiconductor feature as a template, the via alignment is determined by lateral patterning rather than deep vertical etching, effectively moving the alignment constraint to a different dimensional approach with larger process windows.
3Area of stationary object
If routing features are moved to the backside of the substrate to ease packing density, then packing density is improved, but via formation becomes more challenging
Solution Approach 1:
The sacrificial semiconductor feature acts as an intermediary element that simplifies via formation. It is deposited, patterned, and selectively removed to create the via opening, serving as a mediator that enables backside via formation without requiring complex deep trench etching processes through the substrate.
Data Source
AI summary
A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary method includes forming a sacrificial feature in a substrate, forming a source/drain feature over the sacrificial feature and protruding from the substrate, planarizing the substrate from its back to reduce its thickness, performing a first etching process to selectively remove the substrate without substantially etching the sacrificial feature, forming a dielectric layer adjacent to and under the sacrificial feature, performing a second etching process to form a trench in the dielectric layer to expose the sacrificial feature, performing a third etching process to selectively remove the sacrificial feature, and forming a conductive feature in the trench.