Self-Aligned Block Masks for Sub-Lithographic Conductive Paths
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for defining patterns for conductive paths in dielectric layers face challenges in achieving sub-lithographic feature sizes and efficient pattern transfer, often requiring complex multi-patterning techniques and separate planarization steps, which can be costly and time-consuming.
Innovation Solution
A method involving the formation of a mask layer with longitudinally extending mask features and side wall spacers, followed by the deposition of an organic spin-on layer and a planarization layer, allows for the creation of self-aligned block masks and trenches in the mask layer, enabling the formation of conductive lines with tip-to-tip configuration without the need for chemical mechanical polishing (CMP) and Chloride-based etching chemistries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple patterning techniques and separate planarization steps are used to achieve sub-lithographic feature sizes, then manufacturing precision is improved, but device complexity and loss of time increase
Solution Approach 1:
The organic spin-on layer and planarization layer are configured to self-align with the mask features during deposition, automatically forming block masks at correct positions without requiring separate alignment steps or complex multi-patterning processes. The layers serve multiple functions: filling gaps, providing self-alignment, and forming etch masks simultaneously.
Solution Approach 2:
The patent combines the planarization function with the mask formation function by using the planarization layer to form block masks during the same process sequence. This merges what would traditionally be separate steps (planarization and mask patterning) into a unified process, reducing overall process complexity.
2Manufacturing precision
If multiple patterning techniques and separate planarization steps are used to achieve sub-lithographic feature sizes, then manufacturing precision is improved, but loss of time increases
Solution Approach 1:
The organic spin-on layer and planarization layer automatically align with mask features during deposition without requiring separate alignment or measurement steps. This self-aligning mechanism eliminates time-consuming alignment procedures while maintaining sub-lithographic precision.
Solution Approach 2:
The organic spin-on layer is deposited to fill gaps between mask features before the planarization layer is applied. This preliminary filling action prepares the structure for subsequent block mask formation, enabling a streamlined process sequence that reduces overall manufacturing time.
3Manufacturing precision
If conventional methods are used for pattern transfer, then manufacturing precision may be maintained, but ease of manufacture worsens due to requirement for CMP and Chloride-based etching chemistries
Solution Approach 1:
The patent extracts and eliminates the requirement for chemical mechanical polishing (CMP) and Chloride-based etching chemistries from the conventional pattern transfer process. The organic spin-on layer and planarization layer are specifically configured to enable pattern transfer through alternative, simpler mechanisms that do not require these complex chemical processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the efficient definition and transfer of patterns into the dielectric layer with relaxed dimensional and alignment requirements, reducing the number of etching steps and avoiding the need for separate planarization processes, thus improving the overall efficiency and cost-effectiveness of the process.
Implementation Method 1
depositing an organic spin-on layer covering the set of mask features and filling the gaps
Implementation Method 2
depositing in a spin-on process a planarization layer covering the organic spin-on layer and filling the first trench
Implementation Method 3
etching a first trench in the organic spin-on layer, the first trench extending across at least a subset of the gaps and exposing the mask layer
Data Source
AI summary
An example embodiment may include a method for defining patterns for conductive paths in a dielectric layer. The method may include (a) forming a mask layer on the dielectric layer, (b) forming on the mask layer a set of longitudinally and parallel extending mask features, each mask feature including a mandrel having a pair of side wall spacers, the mask features being spaced apart such that gaps are formed between the mask features, (c) depositing an organic spin-on layer covering the set of mask features and filling the gaps, (d) etching a first trench in the organic spin-on layer, the first trench extending across at least a subset of the gaps and exposing the mask layer, and (e) depositing in a spin-on process a planarization layer covering the organic spin-on layer and filling the first trench.


