Self-Aligned Carbide Source/Drain FET for High Density
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Solution Overview
Problem
Existing technologies face challenges in achieving high layout density compatibility for nanostructure-based switching devices with traditional silicon CMOS technology, particularly in precisely positioning source/drain and gate contacts.
Innovation Solution
A field effect transistor (FET) is developed with a metal carbide source and drain portion separated by an insulating carbon layer, featuring a nanostructure connecting the source and drain, and a gate stack formed over the carbon and nanostructure, utilizing a self-aligned carbide contact formation process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional silicon CMOS gate shadowing and self-aligned silicide processes are used, then precise positioning of source/drain and gate contacts is achieved, but compatibility with nanostructure-based switching devices is limited
Solution Approach 1:
An insulating carbon layer is introduced as an intermediary between the metal layer and the nanostructure. This carbon layer enables selective conversion to metal carbide in regions not covered by the gate stack, while protecting regions under the gate stack from carbide formation. This mediator allows precise positioning of source/drain contacts relative to the gate stack while being compatible with various nanostructure types (carbon nanotubes, graphene, semiconducting nanowires), thus resolving the contradiction between adaptability and positioning precision.
2Productivity
If high layout density is achieved, then more devices per unit area are obtained, but precise positioning of contacts becomes more difficult
Solution Approach 1:
The gate stack itself serves as the alignment reference for forming the metal carbide source/drain contacts. By using the gate stack's physical presence to define the regions where metal carbide should and should not form, the process automatically ensures precise positioning without requiring additional alignment steps. This self-aligned approach enables high layout density while maintaining contact positioning precision, as each device's gate stack independently defines its own contact positions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise and self-aligned positioning of source and drain contacts relative to the gate stack, enhancing compatibility with high layout density and improving the performance of nanostructure-based FETs.
Implementation Method 1
converting exposed portions of the insulating carbon layer to a metal carbide
Data Source
AI summary
A field effect transistor includes a metal carbide source portion, a metal carbide drain portion, an insulating carbon portion separating the metal carbide source portion from the metal carbide portion, a nanostructure formed over the insulating and carbon portion and connecting the metal carbide source portion to the metal carbide drain portion, and a gate stack formed on over at least a portion of the insulating carbon portion and at least a portion of the nanostructure.