Self-Aligned Contact Air Gaps for FinFET Capacitance Control
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Solution Overview
Problem
The formation of air gaps between source/drain contact plugs and nearby metal gates in FinFET technologies is challenging due to damage during the formation of contact plugs, leading to overlay shift and increased coupling capacitance, which degrades device performance.
Innovation Solution
Forming air gaps after the contact plugs by selectively removing dummy features, ensuring self-alignment and precise control of their locations and profiles, thereby reducing coupling capacitance and improving device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If air gaps are formed before contact plugs, then coupling capacitance is reduced, but air gaps are damaged during contact plug formation leading to overlay shift
Solution Approach 1:
The patent inverts the conventional sequence by forming air gaps after contact plugs rather than before. This reversal prevents the air gaps from being damaged during contact plug formation, eliminating overlay shift while maintaining the capacitance reduction benefit. The air gaps are formed in a protective manner after the contact plugs are already in place.
Solution Approach 2:
The patent performs preliminary actions by forming contact plugs and their protective structures (such as mandrels and spacers) before creating the air gaps. This preliminary preparation ensures that when air gaps are subsequently formed, the contact plugs are already protected and positioned correctly, preventing any potential damage or misalignment.
2Object-generated harmful factors
If low-k dielectric materials are used between S/D features and gates, then coupling capacitance is reduced, but fabrication becomes difficult due to brittleness and process sensitivity
Solution Approach 1:
The patent extracts the problematic low-k dielectric material from the structure and replaces it with air gaps. By removing the solid dielectric material and creating void spaces filled with air (or vacuum), the patent achieves lower capacitance without the fabrication difficulties associated with depositing and processing brittle low-k materials.
Solution Approach 2:
The patent uses air (an inert atmosphere) to fill the gap spaces between contact plugs and gates. This inert environment provides excellent electrical insulation with minimal capacitance while being completely stable and insensitive to fabrication processes such as etching, annealing, and polishing, eliminating all the process sensitivity issues of low-k dielectrics.
3Object-generated harmful factors
If air gap formation is performed before contact plugs, then capacitance reduction is achieved, but control of air gap location and profile becomes difficult
Solution Approach 1:
The patent implements self-service by using the contact plugs themselves as the reference structures for defining air gap locations. The air gaps are formed adjacent to the contact plugs, using the contact plug positions as automatic alignment references. This self-aligning mechanism eliminates the need for separate alignment processes and ensures precise positioning control.
Solution Approach 2:
The patent merges the air gap formation process with the contact plug structure definition. By forming air gaps in the same patterning and etching steps that define contact plug locations, the patent ensures that air gap positions are automatically aligned with contact plugs, achieving precise control without additional alignment complexity.
Data Source
AI summary
In one example aspect, a method for integrated circuit (IC) fabrication comprises providing a device structure including a substrate, a source/drain (S/D) feature on the substrate, a gate stack on the substrate, a contact hole over the S/D feature; and a dummy feature over the S/D feature and between the gate stack and the contact hole. The method further comprises forming in the contact hole a contact plug that is electrically coupled to the S/D feature, and, after forming the contact plug, selectively removing the dummy feature to form an air gap that extends higher than a top surface of the gate stack. The method further comprises forming over the contact plug a seal layer that covers the air gap.


