Self-Aligned Contact Barrier Layer Selective Etch
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Solution Overview
Problem
The formation of irregular barrier features during the trench formation process in self-aligned contact fabrication leads to pinching of metal material, resulting in voids and increased contact resistance in semiconductor devices.
Innovation Solution
The method involves forming trenches through a gate cap, depositing a barrier layer that conforms to the trench sidewalls, selectively etching the barrier layer to remove irregular features, and filling the trenches with metal material to form self-aligned contacts without pinching, ensuring direct contact with the gate cap.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a barrier layer is deposited to conform to trench sidewalls during self-aligned contact fabrication, then the barrier layer provides necessary protection and adhesion, but irregular barrier features such as raised shoulder portions form at corners, causing pinching of metal material and formation of voids
Solution Approach 1:
The patent applies preliminary action by performing a selective etch step on the barrier layer before metal deposition. This etch step removes irregular barrier features (raised shoulder portions) at trench corners in advance, preventing them from causing metal pinching and void formation during subsequent metal filling. The barrier layer is etched selectively to create a modified profile that eliminates the root cause of the defect before the metal deposition step occurs.
2Strength
If the barrier layer is left intact to maintain structural integrity, then the barrier layer prevents metal diffusion, but the irregular barrier features cause pinching and voids that increase contact resistance
Solution Approach 1:
The patent applies local quality by selectively modifying only the irregular portions of the barrier layer at trench corners while preserving the majority of the barrier layer structure. The selective etch process targets specifically the raised shoulder portions and irregular features, leaving the rest of the barrier layer intact to maintain its protective and adhesive functions. This localized modification approach maintains overall barrier integrity while eliminating the specific defects causing high contact resistance.
3Manufacturing precision
If the barrier layer is completely removed to eliminate pinching issues, then voids are prevented, but the barrier layer's protective and adhesive functions are lost
Solution Approach 1:
The patent applies local quality by selectively modifying only the irregular portions of the barrier layer at trench corners while preserving the majority of the barrier layer structure. The selective etch process targets specifically the raised shoulder portions and irregular features, leaving the rest of the barrier layer intact to maintain its protective and adhesive functions. This localized modification approach maintains overall barrier integrity while eliminating the specific defects causing high contact resistance.
Solution Approach 2:
The patent applies the extraction principle by removing only the harmful irregular barrier features (raised shoulder portions) from the barrier layer structure, while leaving the beneficial portions of the barrier layer intact. This selective removal extracts specifically the defective elements that cause pinching and void formation, preserving the essential protective and adhesive functions of the barrier layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces or eliminates voids in metal contacts, thereby decreasing contact resistance and improving current throughput in semiconductor devices.
Implementation Method 1
depositing a barrier layer that conforms to sidewalls of the at least one trench
Data Source
AI summary
A semiconductor device including at least one self-aligned contact has at least one gate electrode on a bulk substrate layer of the semiconductor device. A gate cap encapsulates the at least one gate electrode. The semiconductor device further includes at least one contact separated from the at least one gate electrode via a portion of the gate cap. The at least one contact includes a metal portion that directly contacts the gate cap.