Self-Aligned Contact Plugs in Semiconductor Memory Structures
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Solution Overview
Problem
The challenge in fabricating Dynamic Random Access Memory (DRAM) devices is the overlay shift issue in photolithography processes, which can cause short circuits between conductive features, complicating the scaling down of element sizes and affecting the reliability and yield of semiconductor memory structures.
Innovation Solution
A method involving the formation of a semiconductor memory structure with a hard mask layer, etching to create mask patterns, and the use of capping layers with a convex-concave profile to self-align contact openings, eliminating the need for additional photolithography masks and thereby avoiding overlay shift issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If photolithography and etching processes are used to form conductive features, then element density can be increased, but overlay shift causes short circuits between conductive features
Solution Approach 1:
The patent divides the mask pattern formation into multiple stages: first forming a mandrel pattern, then using it to create a sacrificial layer pattern, and finally using that to form the final conductive feature pattern. This multi-stage segmentation allows each patterning step to be self-aligned to the previous one, eliminating overlay shift issues while enabling continued scaling for higher element density
Solution Approach 2:
The patent performs preliminary actions by first forming the mandrel pattern and then using it to define the sacrificial layer pattern before forming the actual conductive features. This preliminary patterning establishes precise alignment references that guide subsequent etching steps, ensuring that conductive features are correctly positioned without relying on overlay accuracy from separate photolithography steps
2Manufacturing precision
If additional photolithography masks are used to form contact openings, then manufacturing precision can be improved, but process complexity and overlay shift risks increase
Solution Approach 1:
The patent implements self-service by designing the mask pattern formation process to be self-aligned. The previously formed patterns automatically serve as alignment references for subsequent patterning steps, eliminating the need for separate photolithography masks. The sacrificial layer pattern self-aligns to the mandrel pattern, and the contact openings self-align to the underlying structures, achieving high precision without additional mask steps
Solution Approach 2:
The patent merges multiple functions into fewer process steps. The sacrificial layer pattern formation simultaneously serves as both a patterning step for defining contact opening locations and as an alignment reference for subsequent etching. This merging eliminates the need for separate photolithography mask steps while maintaining manufacturing precision
Data Source
AI summary
A method for forming a semiconductor memory structure includes forming a hard mask layer over a semiconductor substrate, etching the hard mask layer to form first mask patterns and second mask patterns, transferring the first and second mask patterns to the substrate to form semiconductor blocks, and thinning down the second mask element. After thinning down the second mask element, the thickness of the second mask elements is less than the thickness of the first mask elements. The method also includes forming a first capping layer to laterally extend over the first mask patterns and the second mask patterns, and etching the first capping layer and the second mask pattern to form contact openings.