Self-Aligned Deep Implant Mask for CMOS Image Sensor Photodiodes
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Solution Overview
Problem
Conventional methods for fabricating CMOS image sensors with pinned photodiodes fail to achieve both sufficient depth and precise alignment of deep implant regions with polysilicon gate structures, leading to noise and alignment issues.
Innovation Solution
A method involving a thick mask that is self-aligned to the polysilicon structure during the high energy implant process, ensuring both deep implant regions and precise registration with the gate, using a single-step or two-step polysilicon photolithography and etch process to form transfer gates and diode implants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a self-aligned shallow implantation process is used to form the diode diffusion region adjacent to the transfer gate, then alignment precision between the implant region and transfer gate is improved, but the implant depth becomes insufficient
Solution Approach 1:
The implantation process is segmented into two distinct stages: a first shallow implantation process that establishes precise alignment with the transfer gate using the photoresist mask, and a second deep implantation process that achieves sufficient implant depth. This segmentation allows each process to be optimized independently for its specific requirement.
Solution Approach 2:
The first shallow implantation process is performed as a preliminary action before the second deep implantation. This preliminary implant creates a foundation layer that is precisely aligned with the transfer gate, and subsequent processing steps build upon this aligned foundation to achieve the final deep implant region.
2Length of moving object
If conventional implantation processes are used, then the implant depth can be sufficient, but alignment precision with the transfer gate deteriorates due to fabrication process tolerance variations
Solution Approach 1:
The photoresist mask serves as an intermediary element that mediates between the implantation process and the transfer gate structure. By using the photoresist pattern as the alignment reference during implantation, the process achieves both sufficient implant depth and precise alignment, eliminating the need for tight fabrication tolerances in subsequent steps.
3Object-affected harmful factors
If the link region between the photodiode and transfer gate is not precisely formed, then noise increases, but achieving precise alignment requires complex fabrication processes
Solution Approach 1:
The fabrication process is designed to be self-aligning, where the photoresist mask automatically defines the precise location of the implant region relative to the transfer gate. This self-service alignment mechanism eliminates the need for complex additional alignment steps and ensures precise link region formation without increasing overall process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides deep implant regions that are precisely aligned with the polysilicon gate, enhancing the depth and alignment of photodiodes, thereby reducing noise and improving the reliability of CMOS image sensors.
Implementation Method 1
a deep implant process is performed to form a deep implant region in the silicon wafer
Implementation Method 2
the thick mask material facilitates the implant process by preventing ions from passing through the polysilicon gate structure
Data Source
AI summary
A CMOS image sensor includes a pinned photodiode and a transfer gate that are formed using a thick mask that is self-aligned to at least one edge of the polysilicon gate structure to facilitate both the formation of a deep implant and to provide proper alignment between the photodiode implant and the gate. In one embodiment a drain side implant is formed concurrently with the deep n-type implant of the photodiode. After the deep implant, the mask is removed and a shallow p+ implant is formed to complete the photodiode. In another embodiment, the polysilicon is etched to define only a drain side edge, a shallow drain side implant is performed, and then a thick mask is provided and used to complete the gate structure, and is retained during the subsequent high energy implant. Alternatively, the high energy implant is performed prior to the shallow drain side implant.