Self-Aligned Diffusion Contact for Replacement Gate MOSFET
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Solution Overview
Problem
As semiconductor devices shrink, the formation of contact structures to source and drain regions becomes challenging due to the risk of electrically shorting to the gate electrode, exacerbated by the thinning of dielectric gate spacers during anisotropic etch processes, which affects product yield and reliability.
Innovation Solution
A semiconductor structure with a self-aligned contact overlying a dielectric gate cap, involving a disposable gate stack, a gate spacer, and a planarization layer, where a replacement gate stack is formed, and an anisotropic etch is used to create a via cavity that coincides with the gate spacer, allowing a conductive via structure to protrude above the dielectric gate cap, thereby avoiding excessive spacer removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the dielectric gate spacer is thinned during the anisotropic etch process to enable contact formation, then contact structures can be formed to source and drain regions, but the likelihood of excessive removal of the dielectric gate spacer increases, leading to electrical shorts between contact structures and the gate electrode
Solution Approach 1:
The patent forms a mandrel structure and dielectric gate spacer before the anisotropic etch process, establishing precise geometric boundaries in advance. The mandrel is positioned such that its sidewalls define the exact location where contact structures will eventually form, ensuring that contacts are self-aligned to the correct position and cannot short to the gate electrode even if the spacer is thinned during etching.
Solution Approach 2:
The patent introduces a mandrel structure as an intermediary element that mediates between the contact formation process and the gate electrode. The mandrel acts as a temporary placeholder that defines the contact location, allowing the dielectric gate spacer to be thinned during etching without risking shorts, because the mandrel's sidewalls serve as etch stop references that prevent over-etching into the gate region.
2Length of moving object
If the dielectric gate spacer is made thinner to accommodate scaled device dimensions, then device scaling is achieved, but the probability of electrical short between contact structures and gate electrode increases due to process variations
Solution Approach 1:
The patent employs a self-aligned contact formation approach where the contact structures automatically position themselves relative to the gate electrode through the mandrel's sidewalls. The anisotropic etch process uses the mandrel's sidewalls as self-defined etch stop references, eliminating the need for separate alignment steps and ensuring that contacts are precisely positioned regardless of spacer thickness variations.
Solution Approach 2:
The mandrel structure is formed in advance with precise dimensions and positioning, establishing the contact location before any etching occurs. This preliminary structuring ensures that even when the dielectric gate spacer is thinned during subsequent etch processes, the contact structures remain properly aligned and spaced from the gate electrode.
3Productivity
If the anisotropic etch process is used to form contact vias, then contact structures can be formed, but excessive removal of the dielectric gate spacer occurs within normal process variations, increasing short risk
Solution Approach 1:
The mandrel structure serves as an intermediary etch stop reference during the anisotropic etch process. The mandrel's sidewalls are positioned to define the precise depth and lateral boundaries of the contact vias, allowing the etch process to proceed aggressively without risking over-removal of the dielectric gate spacer, because the mandrel physically stops the etch before it can reach the gate electrode.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable electrical contact to source and drain regions while preventing shorts to the gate electrode, enhancing yield and reliability by precisely controlling the etching process and maintaining the integrity of the dielectric gate spacer.
Implementation Method 1
An anisotropic etch removes the dielectric material of the planarization layer selective to the material of the dielectric gate cap, thereby forming at least one via cavity having sidewalls that coincide with a portion of the sidewalls of the gate spacer
Data Source
AI summary
A replacement gate field effect transistor includes at least one self-aligned contact that overlies a portion of a dielectric gate cap. A replacement gate stack is formed in a cavity formed by removal of a disposable gate stack. The replacement gate stack is subsequently recessed, and a dielectric gate cap having sidewalls that are vertically coincident with outer sidewalls of the gate spacer is formed by filling the recess over the replacement gate stack. An anisotropic etch removes the dielectric material of the planarization layer selective to the material of the dielectric gate cap, thereby forming at least one via cavity having sidewalls that coincide with a portion of the sidewalls of the gate spacer. A portion of each diffusion contact formed by filling the at least one via cavity overlies a portion of the gate spacer and protrudes into the dielectric gate cap.