Self-Aligned FinFET Nanosheet Stack Alignment Method
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Solution Overview
Problem
The challenge in manufacturing hybrid multi-stack semiconductor devices is the misalignment or disappearance of fin structures during the formation of finFET stacks on nanosheet stacks, which affects the density and stability of the transistor structures.
Innovation Solution
A self-alignment method is employed where a spacer layer is used to reduce the width of a recess in the finFET stack, allowing a mask layer to be formed with precise horizontal distances from the nanosheet stack sides, ensuring that the fin structures are accurately positioned and aligned with respect to the nanosheet stack, and subsequently, the gate structures are formed to enclose both the finFET and nanosheet stacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional manufacturing methods are used to form fin structures on nanosheet stacks, then the device density can be increased, but the fin structures may misalign or disappear during formation
Solution Approach 1:
The method performs preliminary actions by forming the nanosheet stack first, then using its side surfaces as alignment references for subsequent fin structure formation. The spacer layers are deposited conformally on the nanosheet stack before pattern removal, ensuring the fin structures will be self-aligned to the nanosheet stack sides, thus preventing misalignment during the formation process.
Solution Approach 2:
The nanosheet stack serves itself as the alignment reference for fin structure formation. The side surfaces of the nanosheet stack directly define the positioning of the fin structures through the spacer layer deposition process, eliminating the need for external alignment marks or complex photolithography alignment procedures.
2Manufacturing precision
If spacer layers are used to reduce recess width for mask layer formation, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The spacer layers act as intermediary elements between the nanosheet stack and the mask layer. They are deposited conformally to define the recess width, then removed after serving their alignment function. This intermediary approach simplifies the overall process by using a self-aligned deposition method rather than requiring complex lithography and etching steps to achieve the same precision.
Data Source
AI summary
A hybrid multi-stack semiconductor device and a method of manufacturing the same are provided. The hybrid multi-stack semiconductor device includes a nanosheet stack and a fin field-effect transistor (finFET) stack formed above the nanosheet stack, wherein the nanosheet stack includes a plurality of nanosheet layers formed above a substrate and enclosed by a 1st gate structure, wherein the at least one fin structure has a self-aligned form with respect to the nanosheet stack so that a left horizontal distance between a leftmost side surface of the at least one fin structure and a left side surface of the nanosheet stack is equal to a right horizontal distance between a rightmost side surface of the at least one fin structure and a right side surface of the nanosheet stack.