Self-Aligned Hard Mask Patterning for Sub-10 Nm Fin Structures
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Solution Overview
Problem
Existing lithography techniques face challenges in patterning semiconductor structures with sub-10 nm features due to limitations such as light diffraction in photolithography and electron scattering in electron-beam lithography.
Innovation Solution
A method for forming a semiconductor device using fewer lithography processes, which involves forming fin structures through self-aligned hard mask processes, reducing reliance on photolithography and overcoming limitations related to feature size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography is used for patterning, then manufacturing process is simple, but manufacturing precision deteriorates for sub-10 nm features due to light diffraction
Solution Approach 1:
The patent segments the patterning process into multiple steps: forming mandrels at a first pitch, depositing spacers, selectively removing portions, and iteratively creating features at progressively smaller pitches (e.g., 10nm, 5nm, 2nm). This multi-stage self-aligned approach enables sub-10nm precision without requiring single-step photolithography at impractically small wavelengths
Solution Approach 2:
The patent transitions from planar 2D photolithography patterning to 3D self-aligned patterning using vertical spacers and mandrels. By utilizing the vertical dimension for spacer deposition and selective removal, the process achieves precision beyond the lateral resolution limits of optical diffraction
2Manufacturing precision
If electron-beam lithography is used for patterning, then manufacturing precision improves for sub-10 nm features, but manufacturing time increases due to electron scattering
Solution Approach 1:
The patent performs preliminary patterning at larger dimensions using conventional photolithography to create mandrels, then uses these pre-formed structures as templates for subsequent self-aligned spacer formation. This preliminary action at larger, faster-to-pattern dimensions enables final sub-10nm features to be created without direct electron-beam writing
Solution Approach 2:
The self-aligned spacer formation process is self-service in that the mandrels automatically define the spacer positions and dimensions through conformal deposition. The structure serves its own patterning function without requiring external alignment systems or slow serial electron-beam writing, achieving high precision through the geometry of the deposited layers themselves
Data Source
AI summary
A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.