Self-Aligned Metal Gate Patterning for Stacked Channel Selectivity

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Solution Overview

Problem

Challenges exist in selectively depositing different work function metal layers for stacked multi-gate devices, particularly in ensuring the top active region is substantially free of the first work function metal layer during the formation of complementary field effect transistors (C-FETs).

Innovation Solution

A method involving the use of a titanium-containing dummy liner and a self-assembled precursor to form a blocking layer that binds to the dummy liner, allowing selective deposition of a first work function metal layer around the bottom channel members, followed by deposition of a second work function metal layer around the top channel members, thereby avoiding the need for etching back excess metal on the top region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional gate formation processes are used for stacked multi-gate devices, then the basic structure can be formed, but selective deposition of different work function metal layers becomes difficult and excess metal must be removed by etching back

Engineering Contradiction:
Improveselective deposition of work function metal layersVSAvoidetching back process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A blocking layer is formed on the sidewalls of the top channel members before depositing the first work function metal layer. This preliminary blocking action prevents the metal from depositing on the top region, eliminating the need for subsequent etching back operations while achieving precise selective deposition.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The blocking layer acts as an intermediary substance between the first work function metal layer and the top channel members. This intermediate layer selectively prevents metal deposition on the top region while allowing deposition on the bottom region, enabling precise control without complex etching processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If work function metal layers are deposited for stacked multi-gate devices, then threshold voltage optimization is achieved, but damage to surrounding structures occurs due to excess metal

Engineering Contradiction:
Improvethreshold voltage optimizationVSAvoiddamage to surrounding structures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The blocking layer converts the potentially harmful effect of uncontrolled metal deposition into a beneficial selective deposition process. By strategically placing the blocking layer, the metal deposition process naturally becomes self-limiting, preventing damage to surrounding structures while maintaining the desired threshold voltage optimization.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The blocking layer is formed in advance on the sidewalls of the top channel members before metal deposition. This preliminary protective action ensures that when the first work function metal layer is deposited, it automatically stops at the blocking layer, preventing any damage to the top region and surrounding structures.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If different work function metal layers are deposited for n-type and p-type transistors, then device performance is improved, but the process becomes more complex and time-consuming

Engineering Contradiction:
Improvedifferent work function metal layers for different transistor typesVSAvoiddeposition process time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The blocking layer is formed before depositing the first work function metal layer, enabling subsequent selective deposition of different metal layers for n-type and p-type transistors without requiring additional etching steps. This preliminary action streamlines the process and reduces overall deposition time while maintaining the ability to use different work function metals for different transistor types.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise and efficient deposition of work function metal layers, reducing damage to surrounding structures and improving the threshold voltage optimization of stacked multi-gate devices.

Implementation Method 1

forming a blocking layer that binds to the dummy liner

Methodology Applied
Scientific EffectSelf-assembly: Self-Assembly

Implementation Method 2

a self-assembled precursor to form a blocking layer that binds to the dummy liner

Methodology Applied
Scientific EffectAdsorption: Adsorption

Implementation Method 3

selective deposition of a first work function metal layer around the bottom channel members

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 4

deposition of a second work function metal layer around the top channel members

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS20250359287A1Self-aligned patterning layer for metal gate formation
Publication Date: 2025.11.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250359287A1 patent drawing
  • US20250359287A1 patent drawing
  • US20250359287A1 patent drawing

AI summary

Methods of forming a metal gate structure of a stacked multi-gate device are provided. A method according to the present disclosure includes depositing a titanium nitride (TiN) layer over a channel region that includes bottom channel layers and top channel layers, depositing a dummy fill layer to cover sidewalls of the bottom channel layers, after the depositing of the dummy fill layer, selectively forming a blocking layer over the TiN layer along sidewalls of the top channel layers, selectively removing the dummy fill layer to release the bottom channel layers, selectively depositing a first work function metal layer to wrap around each of the bottom channel layers, forming a gate isolation layer over a top surface of the first work function metal layer, removing the blocking layer, releasing the top channel layers, and selectively depositing a second work function metal layer to wrap around each of the top channel layers.