Self-Aligned Gate Endcap Contacts for Tighter Transistor Layouts

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Solution Overview

Problem

The scaling of multi-gate transistors in integrated circuits leads to constraints in lithographic processes, particularly in achieving the smallest feature dimension and spacing between features, resulting in increased capacitance and switching delays, and introducing process integration challenges and defects.

Innovation Solution

The implementation of a self-aligned gate endcap (SAGE) architecture with a perpendicular grid of insulating material, where the intersection with gates or contacts provides all interconnect locations, eliminating the need for extra length to account for mask registration errors and reducing the number of lithographic patterning steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional lithographic processes are used to pattern multi-gate transistors, then the smallest feature dimension can be achieved, but the spacing between features increases and mask registration errors require extra length

Engineering Contradiction:
Improvesmallest feature dimensionVSAvoidspacing between features
Core Design Contradiction:
Length of moving objectVSLength of stationary object

Solution Approach 1:

The gate endcap structure serves itself by providing a self-aligned reference feature that automatically defines the position of subsequent structures without requiring additional mask alignment. The gate endcap's own geometry and position are used as the reference, eliminating the need for separate alignment marks and reducing spacing requirements.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention introduces a vertical dimension solution by using the gate endcap's height and three-dimensional geometry as the alignment reference, rather than relying solely on planar two-dimensional mask alignment. This allows precise positioning in the lateral direction through vertical self-alignment.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If extra length is added to account for mask registration errors, then alignment reliability improves, but transistor layout area increases

Engineering Contradiction:
Improvealignment reliabilityVSAvoidtransistor layout area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The gate endcap structure serves itself by providing a self-aligned reference feature that automatically defines the position of subsequent structures without requiring additional mask alignment. The gate endcap's own geometry and position are used as the reference, eliminating the need for separate alignment marks and reducing spacing requirements.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention changes the alignment parameter from lateral mask registration to vertical self-alignment through the gate endcap structure. This parameter transformation allows precise positioning without requiring additional lateral spacing for mask registration errors.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If additional mask operations are performed to ensure proper alignment, then manufacturing precision improves, but the number of lithographic patterning steps increases

Engineering Contradiction:
Improvefeature alignment precisionVSAvoidnumber of lithographic patterning steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The invention merges the alignment reference function with the gate endcap structure itself, combining what would traditionally be separate elements (alignment marks and gate structures) into a single integrated feature. This eliminates the need for separate alignment operations and reduces the total number of patterning steps.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate endcap structure performs multiple functions: it serves as both the functional gate structure and as the alignment reference for subsequent patterning steps. This multi-functionality eliminates the need for dedicated alignment marks and reduces process complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11935892B2Self-aligned gate endcap (SAGE) architecture having gate contacts
Publication Date: 2024.03.19 INTEL CORP
  • US11935892B2 patent drawing
  • US11935892B2 patent drawing
  • US11935892B2 patent drawing

AI summary

Self-aligned gate endcap (SAGE) architectures having gate contacts, and methods of fabricating SAGE architectures having gate contacts, are described. In an example, an integrated circuit structure includes a gate structure over a semiconductor fin. A gate endcap isolation structure is laterally adjacent to and in contact with the gate structure. A trench contact structure is over the semiconductor fin, where the gate endcap isolation structure is laterally adjacent to and in contact with the trench contact structure. A local gate-to-contact interconnect is electrically connecting the gate structure to the trench contact structure.