Self-Aligned Metal Gate Cut Structure Using a Dielectric Fin

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Solution Overview

Problem

The challenge in semiconductor IC fabrication is effectively isolating metal gates using a cut metal gate process, particularly in advanced process nodes where misalignment and overlay issues during lithography and etching can lead to circuit defects such as short circuits and defective transistors.

Innovation Solution

A self-aligned cut metal gate method is devised, where the positions of cut metal gate trenches and the isolation material are accurately controlled using a dielectric fin that defines the trench positions during fin formation, thereby reducing sensitivity to misalignment and overlay problems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional lithography and etching processes are used for cut metal gate isolation, then the manufacturing process is simple, but misalignment and overlay problems occur leading to circuit defects

Engineering Contradiction:

Improvecircuit defect rateVSAvoidtrench position accuracy

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The dielectric fin is formed beforehand during the fin formation process, establishing predetermined positions that will later define the cut metal gate trench locations. This preliminary structuring eliminates the need for subsequent alignment-critical lithography steps, as the fin positions inherently determine the trench positions.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The dielectric fin structure serves dual purposes: it acts as both the structural element during fin formation and as the positioning reference for the cut metal gate trenches. The fin itself provides the self-alignment reference, eliminating the need for separate alignment markers or complex overlay processes.

Inventive Principle:

Principle #25Self-service

2Manufacturing precision

If self-aligned cut metal gate method is used, then trench position control is precise, but the device complexity increases

Engineering Contradiction:

Improvetrench position accuracyVSAvoidprocess steps

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The formation of the dielectric fin and the establishment of trench position references are merged into a single process sequence. The fin formation process simultaneously creates both the structural fin and the positioning reference, combining what could be separate operations into one integrated process flow.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The dielectric fin structure performs multiple functions: it serves as the structural element for the device, acts as the positioning reference for trench formation, and provides the basis for self-aligned isolation. This multi-functionality reduces the need for additional dedicated alignment structures or processes.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12347690B2Method for metal gate cut and structure thereof

Publication Date: 2025.07.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device includes a first fin protruding upwardly from a substrate, a second fin protruding upwardly from the substrate, a first gate structure having a first portion that at least partially wraps around an upper portion of the first fin and a second portion that at least partially wraps around an upper portion of the second fin, a second gate structure having a portion that at least partially wraps around the upper portion of the first fin, and a dielectric feature having a first portion between the first and second portions of the first gate structure. In a lengthwise direction of the first fin, the dielectric feature has a second portion extending to a sidewall of the second gate structure.