Self-Aligned Gate Structure for Semiconductor Devices

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Solution Overview

Problem

The existing methods for manufacturing transistors, such as finFET and MBCFET, face issues with inconsistent gate structure dimensions due to photolithography masking misalignment, leading to unstable current control, short circuits, and reduced productivity.

Innovation Solution

A self-aligned gate structure is implemented by depositing a gate masking layer on the channel structures, allowing it to spread and extend outward, ensuring equal width on both sides, which is then etched to maintain consistent dimensions, eliminating the need for photolithography masking in the gate-cut process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If photolithography masking process is used to define gate structure, then gate structure can be formed, but misalignment occurs leading to inconsistent gate structure dimensions

Engineering Contradiction:

Improvegate structure dimension consistencyVSAvoidcurrent control stability

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The gate structure is formed using a self-aligned process where the gate masking layer automatically aligns with the channel structure through conformal deposition. The gate structure defines itself relative to the channel structure without requiring separate photolithography alignment steps, eliminating misalignment issues and ensuring consistent dimensions.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The gate masking layer is deposited conformally on the channel structure before any gate cut process. This preliminary conformal deposition establishes the self-aligned relationship in advance, ensuring that the gate structure will have consistent dimensions regardless of subsequent processing steps.

Inventive Principle:

Principle #10Preliminary action

2Ease of manufacture

If photolithography masking is used, then gate structure is defined, but misalignment causes insufficient gate structure size and requires additional gate cut process

Engineering Contradiction:

Improvegate structure formation processVSAvoidgate structure dimension consistency

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The gate masking layer serves as both the definition structure and the alignment reference simultaneously. Through self-aligned conformal deposition, the gate structure defines itself relative to the channel structure, eliminating the need for separate photolithography alignment and gate cut processes while maintaining dimensional consistency.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The gate masking layer formation and gate structure definition are merged into a single self-aligned conformal deposition process. This combines what were previously separate steps (photolithography masking followed by gate cut) into one integrated process that inherently ensures dimensional consistency.

Inventive Principle:

Principle #5Merging (Combining)

3Productivity

If gate cut process is performed, then gate structure is separated, but misalignment leads to short circuit and connection failure

Engineering Contradiction:

Improvemanufacturing throughputVSAvoiddevice yield

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The gate structure automatically aligns with the channel structure through self-aligned conformal deposition, eliminating misalignment issues that would require corrective gate cut operations. This self-alignment prevents short circuits and connection failures, improving device yield without sacrificing productivity.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The self-aligned conformal deposition of the gate masking layer is performed preliminarily to establish correct alignment before any gate separation operations. This preliminary self-alignment prevents subsequent alignment-related failures during gate cutting or device assembly, improving reliability without adding process steps.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures consistent gate structure dimensions across semiconductor devices, enhancing current control and reducing the likelihood of short circuits, thereby improving yield and productivity.

Implementation Method 1

depositing a gate masking layer on the channel structures

Methodology Applied

Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS11569232B2Semiconductor device including self-aligned gate structure and method of manufacturing the same

Publication Date: 2023.01.31 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of manufacturing a semiconductor device having a self-aligned gate structure includes: providing at least one channel structure above at least one substrate; depositing at least one gate masking layer on the at least one channel structure so that the at least one gate masking layer is formed on top and side surfaces of the at least one channel structure and spread outward above the at least one substrate to form outer-extended portions of the at least one gate masking layer, before a gate-cut process is performed, wherein the at least one gate masking layer is self-aligned with respect to the at least one channel structure by the depositing; and removing the outer-extended portions of the at least one gate masking layer so that the at least one gate masking layer at both sides of the at least one channel structure has a same width.