Self-aligned Graphene FET via Seed Layer
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Solution Overview
Problem
Current methods cannot fabricate self-aligned graphene transistors due to differences in material processing requirements between silicon and carbon, particularly in minimizing parasitic capacitance and resistance between source/drain and gate electrodes.
Innovation Solution
A method involving a seed layer, gate oxide, and gate metal is used to form a self-aligned graphene field effect transistor with an insulating layer and a graphene sheet, where the gate stack is encapsulated in a spacer material to align source/drain and gate electrodes without lithographic alignment, utilizing ALD oxide and metal electrodes to create a minimal un-gated region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If oxide side-wall is formed surrounding the gate stack before source/drain contact formation (Si MOSFET method), then self-alignment is achieved, but this technique cannot be directly applied to graphene due to differences in material processing requirements
Solution Approach 1:
A seed layer is introduced as an intermediary between the graphene sheet and the gate oxide. This seed layer enables the formation of gate oxide on graphene surfaces, which otherwise cannot be directly formed due to material incompatibility. The seed layer mediates the processing difference between silicon and carbon-based materials, allowing the self-aligned fabrication approach to work with graphene.
Solution Approach 2:
The invention changes the surface properties of graphene by depositing a seed layer, which alters the material parameters to enable subsequent oxide formation. This parameter change (adding the seed layer) transforms graphene from a material that cannot support direct oxide growth to one that can, thereby enabling self-aligned fabrication.
2Manufacturing precision
If lithographic alignment is used to align source/drain and gate electrodes, then alignment precision is achieved, but device complexity and manufacturing steps increase
Solution Approach 1:
The fabrication process is designed to be self-aligning, where the gate stack structure and spacer material automatically define the precise positions of source/drain electrodes without requiring external lithographic alignment steps. The process self-corrects and self-positions, eliminating complex alignment procedures while maintaining high precision.
Solution Approach 2:
The gate stack is formed and encapsulated with spacer material before source/drain contact formation. This preliminary action of creating the encapsulated gate stack structure establishes the alignment framework in advance, so that subsequent source/drain deposition automatically occurs in the correct positions without requiring additional alignment steps.
Data Source
AI summary
A graphene field effect transistor includes a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.