Self-Aligned High Voltage Transistor with Asymmetric Spacers
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Solution Overview
Problem
Conventional high-voltage transistors face challenges in achieving enhanced transition frequency, reduced on-resistance, and high breakdown voltage due to misalignment tolerances and high resistivity in drain and device variability, limiting their feasibility in high-speed and high-power applications, especially in RF power amplifiers and 5G mmWave bands.
Innovation Solution
A self-aligned high-voltage transistor design with asymmetric spacers is introduced, featuring a self-aligned drift region and wider drain-side spacers, which reduces variability and eliminates the need for a silicide stop layer, allowing for custom tradeoffs between breakdown voltage, transition frequency, and on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional high-voltage transistor design is used, then breakdown voltage can be achieved, but transition frequency is limited and on-resistance is high
Solution Approach 1:
The transistor structure is segmented into distinct regions with asymmetric spacers on either side of the gate. The first spacer has a first width and the second spacer has a second width different from the first width, allowing independent optimization of different transistor regions for high-frequency and high-voltage performance
Solution Approach 2:
The patent applies asymmetry by configuring the first spacer with a first width and the second spacer with a second width, where the widths are different. This asymmetric configuration allows the drift region to be positioned at a first distance from the gate on one side and at a second distance on the other side, enabling simultaneous optimization for transition frequency and breakdown voltage
2Manufacturing precision
If conventional transistor design is used, then manufacturing can proceed with standard processes, but misalignment tolerances cause device variability
Solution Approach 1:
The drift region is formed prior to the final spacer formation, establishing a self-aligned reference structure. This preliminary positioning of the drift region ensures that subsequent alignment steps have reduced tolerance requirements, as the drift region edge serves as a predetermined reference point
Solution Approach 2:
The drift region serves a dual function: it acts as both the high-voltage sustaining structure and the alignment reference for the spacers. This self-aligning mechanism eliminates the need for separate alignment procedures and reduces device variability caused by misalignment tolerances
3Ease of manufacture
If conventional transistor design is used, then fabrication can be simplified, but on-resistance remains high limiting high-power applications
Solution Approach 1:
The asymmetric spacer configuration creates local quality differences in the transistor structure. The region with the wider spacer has different electrical characteristics than the region with the narrower spacer, allowing local optimization of current flow paths to reduce on-resistance while maintaining overall fabrication simplicity
Data Source
AI summary
Certain aspects of the present disclosure generally relate to a transistor having a self-aligned drift region and asymmetric spacers. One example transistor generally includes a channel region; a gate region disposed above the channel region; a first implant region; a second implant region having a same doping type as the first implant region, but a different doping type than the channel region; a first spacer disposed adjacent to a first side of the gate region; a second spacer disposed adjacent to a second side of the gate region and having a wider width than the first spacer; and a drift region having an edge vertically aligned with an edge of the second spacer and disposed between the channel region and the second implant region. The channel region may be disposed between the first implant region and the drift region.