Self-Aligned Insulator for High-K Metal Gate Reliability
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Solution Overview
Problem
Current semiconductor device fabrication processes face challenges in reducing cost and cycle-time, improving yields, and minimizing defects, particularly in the fabrication of metal-oxide-semiconductor field-effect transistor (MOSFET) devices with high dielectric constant (high-k) metal gates.
Innovation Solution
The method involves forming a semiconductor device with a high-k gate dielectric, a polysilicon gate structure, and a metal gate stack, where a thin dielectric film including oxynitride is self-aligned with the metal gate, and an interlayer dielectric is provided on either side, using techniques such as chemical vapor deposition, atomic layer deposition, and chemical mechanical planarization to optimize the structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication processes are used for high-k metal gate devices, then manufacturing cost and cycle-time are reduced, but reliability and defect rates are adversely affected
Solution Approach 1:
A thin dielectric film is formed over the high-k dielectric layer before the metal gate deposition. This preliminary action creates a self-aligned structure that prevents metal residues from contaminating the gate dielectric interface, thereby improving reliability without adding significant process steps or cycle-time
Solution Approach 2:
The thin dielectric film acts as an intermediary layer between the high-k dielectric and the metal gate. It serves as a barrier that transforms potential harmful metal residues into metal oxynitride, preventing direct contact and contamination while maintaining the electrical performance of the device
2Productivity
If conventional fabrication processes are used for high-k metal gate devices, then manufacturing cost and cycle-time are reduced, but defect rates and yields are adversely affected
Solution Approach 1:
Metal residues that would normally be harmful contaminants are transformed into metal oxynitride through the interaction with the thin dielectric film. This conversion eliminates the harmful effects of metal residues while maintaining process simplicity and high fabrication yields
Solution Approach 2:
The thin dielectric film serves as a protective intermediary that prevents metal residues from reaching and contaminating the gate dielectric interface. This intermediary layer acts as a barrier that eliminates defect formation without complicating the fabrication process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances reliability, reduces chip-level stress, improves yields, and minimizes defects by forming a self-aligned ultra-thin insulator layer and transforming metal residues into metal oxynitride, thereby addressing the limitations of existing fabrication methods.
Implementation Method 1
using techniques such as chemical vapor deposition, atomic layer deposition, and chemical mechanical planarization
Implementation Method 2
using techniques such as chemical vapor deposition, atomic layer deposition, and chemical mechanical planarization
Implementation Method 3
transforming metal residues into metal oxynitride
Data Source
AI summary
A method forming a gate dielectric over a substrate, and forming a metal gate structure over the semiconductor substrate and the gate dielectric. The metal gate structure includes a first metal material. The method further includes forming a seal on sidewalls of the metal gate structure. The method further includes forming a dielectric film on the metal gate structure, the dielectric film including a first metal oxynitride comprising the first metal material and directly on the metal gate structure without extending over the seal formed on sidewalls of the metal gate structure.