Self-Aligned Metal Plugs with Protective Gate Caps

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Solution Overview

Problem

Existing methods for forming self-aligned metal plugs in integrated circuits (ICs) often result in shorts between metal plugs or source/drain contacts and the gate, particularly as device size scales, due to challenges in maintaining the desired thickness and separation of gate structures during processing.

Innovation Solution

A novel technique involving a sacrificial gate and cap structure is used, where a sacrificial gate is replaced with a gate cap, and a sacrificial cap is formed to protect the gate cap during replacement metal plug processing, ensuring the metal plugs are formed above the level of the gate cap and sidewall spacer, thus minimizing the risk of shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional self-aligned metal plug formation techniques are used, then device scaling is achieved, but metal plug to gate shorts and source/drain contact to gate shorts occur

Engineering Contradiction:
Improvedevice scalingVSAvoidshort circuit prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A gate cap layer is formed on the gate structure before metal plug formation. This preliminary protective layer prevents direct contact between subsequent metal plugs and the gate, eliminating short circuit risks while enabling continued device scaling.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate cap layer acts as an intermediary barrier between the gate and metal plugs. This intermediate structure provides physical separation and electrical isolation, preventing shorts while maintaining the self-aligned fabrication approach.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If gate cap thickness is reduced to enable metal plug formation, then self-aligned metal plugs can be formed, but gate cap thickness is compromised

Engineering Contradiction:
Improvemetal plug formationVSAvoidgate cap thickness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The gate cap layer is formed as a preliminary protective structure before metal plug deposition. This allows the gate cap to maintain its full designed thickness throughout the metal plug formation process, ensuring manufacturing precision is not compromised.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate structure is segmented into the original gate and the additional gate cap layer. This segmentation allows independent optimization of each component - the gate cap provides protection and thickness control, while the metal plugs are formed separately above this protective layer.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If metal plugs are formed at the same level as gate cap, then fabrication is simplified, but electrical shorts between gate and metal plugs occur

Engineering Contradiction:
Improvefabrication processVSAvoidelectrical isolation
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Metal plugs are positioned in a higher vertical dimension above the gate cap layer rather than at the same level. This vertical separation in another dimension provides electrical isolation while maintaining lateral alignment, preventing shorts without significantly increasing fabrication complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate cap layer serves as an intermediary structure that enables metal plugs to be formed at a higher level. This intermediate layer provides both physical support and electrical isolation, allowing simplified fabrication processes while ensuring reliable electrical separation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10553486B1Field effect transistors with self-aligned metal plugs and methods
Publication Date: 2020.02.04 GLOBALFOUNDRIES US INC
  • US10553486B1 patent drawing
  • US10553486B1 patent drawing
  • US10553486B1 patent drawing

AI summary

Disclosed is a method of forming an integrated circuit (IC) and the resulting structure. The method includes forming a transistor with a sacrificial gate on a channel region, a gate sidewall spacer on the sacrificial gate, and sacrificial plugs on the source/drain regions. The sacrificial gate is replaced with a gate, a gate cap on the gate, and a sacrificial cap on the gate cap and the gate sidewall spacer (which was recessed). Thus, top surfaces of the gate cap and gate sidewall spacer are at a lower level than the top surfaces of the sacrificial plugs and, when the sacrificial plugs are replaced with metal plugs, the gate cap is protected. In the resulting structure, the gate cap has a desired thickness and the top surface of the gate cap is at a lower level than the top surfaces of the metal plugs to reduce the risk of shorts.