Self-Aligned MRAM Device Structure via Planarization

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Solution Overview

Problem

Conventional methods for forming magnetoresistive random access memory (MRAM) devices require multiple etching steps, leading to etching damage and potential leakage current issues due to long exposure in plasma environments, which deteriorate device performance.

Innovation Solution

A method involving multiple filling steps to form a resistance variable memory cell, including a magnetic tunnel junction layer, followed by a single planarization step without conventional etching, to create a self-aligned MRAM device structure that reduces etching damage and enhances performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If multiple etching steps are used to form MRAM device structures, then the device structure can be formed with conventional processes, but etching damage occurs to the magnetic tunnel junction layer and leakage current increases

Engineering Contradiction:

Improveconventional process compatibilityVSAvoiddevice performance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts and removes the harmful etching steps from the conventional MRAM fabrication process. By replacing multiple etching steps with a planarization process, the invention eliminates the source of etching damage to the magnetic tunnel junction layer while maintaining the ability to form the necessary device structures.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the process parameter from etching (removal of material) to planarization (surface leveling). This fundamental parameter change transforms the fabrication approach from one that causes damage to one that preserves the magnetic tunnel junction layer integrity, thereby reducing leakage current and improving device reliability.

Inventive Principle:

Principle #35Parameter changes

2Manufacturing precision

If multiple etching steps are performed, then the MRAM structure can be formed, but the exposure time in plasma environments increases causing damage

Engineering Contradiction:

Improvestructure formationVSAvoidplasma exposure time

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent removes the multiple etching steps that cause prolonged plasma exposure. By extracting these harmful steps and replacing them with a single planarization process, the invention dramatically reduces the total time the magnetic tunnel junction layer is exposed to plasma environments, preventing time-dependent damage.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The planarization process is performed as a preliminary action that prepares the surface for subsequent processing without requiring the magnetic tunnel junction layer to be exposed to plasma. This preliminary surface preparation eliminates the need for repeated etching and re-exposure cycles.

Inventive Principle:

Principle #10Preliminary action

3Ease of manufacture

If conventional etching methods are used, then the process is well-established, but etching damage to the magnetic tunnel junction layer occurs

Engineering Contradiction:

Improveprocess establishmentVSAvoidlayer integrity

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The invention changes the fundamental process parameter from etching to planarization. This parameter change maintains ease of manufacture through established semiconductor processing techniques while dramatically improving layer integrity by eliminating the mechanical and chemical damage caused by conventional etching methods.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful effect of plasma exposure by replacing the etching function with a planarization function. The same planarization equipment and materials that provide surface leveling also inherently protect the magnetic tunnel junction layer from etching damage, turning a potentially harmful process into a beneficial one.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach eliminates etching damage to the magnetic tunnel junction layer, reducing leakage current and boosting the overall performance of the MRAM device by simplifying the process and eliminating the need for multiple etching steps.

Implementation Method 1

The spins of electrons, through their magnetic moments, rather than the charge of the electrons, are used to indicate a bit

Methodology Applied

Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS9972771B2MRAM devices and methods of forming the same

Publication Date: 2018.05.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

MRAM devices and methods of forming the same are provided. One of the MRAM devices includes a dielectric layer, a resistance variable memory cell and a conductive layer. The dielectric layer is over a substrate and has an opening. The resistance variable memory cell is in the opening and includes a first electrode, a second electrode and a magnetic tunnel junction layer between the first electrode and the second electrode. The conductive layer fills a remaining portion of the opening and is electrically connected to one of the first electrode and the second electrode of the resistance variable memory cell.