Self-Aligned Offset Thin Film Transistor Fabrication

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing thin film transistors (TFTs) face challenges in reducing leakage current due to grain boundary traps, and previous methods like offset structures require complex masking and are not suitable for heat-sensitive substrates like plastic, while laser annealing methods suffer from nonuniform energy distribution and heat treatment issues.

Innovation Solution

A self-aligned offset region is achieved in TFTs by implanting a dopant with lower concentration into offset regions between the channel and source/drain regions, using a method that involves patterning and ashing of the gate layer and insulating layer, followed by laser annealing to ensure uniform heat treatment and dopant diffusion, suitable for both silicon and heat-sensitive substrates like plastic.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a local differential doping process using a mask is used to form an offset structure, then leakage current can be reduced, but the manufacturing process becomes complicated and cannot be used on heat-sensitive substrates

Engineering Contradiction:
Improveleakage current reductionVSAvoiddoping process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate electrode itself serves as the alignment reference for forming the offset region. The gate electrode is patterned first, then the offset region is formed self-aligned to the gate electrode without requiring a separate mask, eliminating the need for complex mask alignment processes while maintaining leakage current reduction

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention changes the doping concentration parameter by forming an offset region with a different doping concentration than the source/drain regions. This parameter change creates the LDD structure that reduces leakage current while the self-aligned formation simplifies the manufacturing process

Inventive Principle:
Principle #35Parameter changes

2Reliability

If oblique-incidence excimer laser annealing is used to eliminate ion doping damage, then drain junction quality improves, but nonuniform energy distribution causes nonuniform heat treatment

Engineering Contradiction:
Improvedrain junction qualityVSAvoidheat treatment uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of using oblique-incidence laser annealing that causes nonuniform energy distribution, the invention uses normal-incidence laser annealing. This inverts the approach by directing the laser beam perpendicular to the substrate surface, which provides uniform energy distribution and uniform heat treatment across the source and drain regions while still eliminating ion doping damage

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a high-quality TFT with reduced leakage current and a well-formed lightly doped drain (LDD) junction, allowing for effective heat treatment and natural dopant diffusion without additional masking processes, suitable for various substrates including plastic.

Implementation Method 1

annealing the exposed portion of the dopant-implanted silicon layer by irradiating a laser on the silicon layer

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 2

effective heat treatment and dopant diffusion

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS7470579B2Method of manufacturing a thin film transistor
Publication Date: 2008.12.30 SAMSUNG ELECTRONICS CO LTD
  • US7470579B2 patent drawing
  • US7470579B2 patent drawing
  • US7470579B2 patent drawing

AI summary

A thin film transistor having an offset or a lightly doped drain (LDD) structure by self alignment and a method of fabricating the same comprises a substrate, a silicon layer disposed on the substrate and including a channel region, a source region and a drain region at both sides of the channel region, and offset regions, each offset regions disposed between the channel region and one of the source and drain regions at both sides of the channel region, a gate insulating layer covering the channel region and the offset regions disposed at both sides of the channel region excluding the source and drain regions, and a gate layer formed on the channel region excluding the offset regions. The thin film transistor has the structure in which an offset or LDD is obtained without an additional mask process.