Self-aligned optical carrier assembly for wafer-scale testing
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Solution Overview
Problem
The production of optical devices is hindered by the time-consuming and costly steps of mounting and coupling optical dies to carriers, which require precise alignment and multiple connections, and existing methods do not efficiently support wafer-scale testing before individual devices are separated.
Innovation Solution
A self-aligned carrier assembly combining glass and silicon substrates, utilizing solder pads and gaseous flux for self-alignment, allowing for wafer-scale assembly, testing, and burn-in of optical devices, followed by dicing into individual units, thereby enabling cost-effective and efficient manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional piece-by-piece mounting methods are used for optical dies, then precise alignment can be achieved, but production time and cost increase significantly
Solution Approach 1:
The patent combines multiple optical dies onto a single carrier substrate simultaneously, merging what were previously separate mounting operations into one integrated process. This allows parallel processing of multiple devices, dramatically improving productivity while maintaining alignment precision through the self-aligned carrier design
Solution Approach 2:
The carrier substrate is prepared in advance with pre-defined alignment features, reference marks, and mounting structures before the optical dies are attached. This preliminary preparation enables rapid, precise mounting of multiple dies without requiring time-consuming alignment operations during the actual assembly process
2Productivity
If wafer scale methods are applied to attach multiple optical dies, then productivity increases, but alignment precision and self-alignment become more difficult to achieve
Solution Approach 1:
The carrier substrate incorporates self-aligned features that automatically guide and position the optical dies during the wafer-scale mounting process. The self-alignment mechanisms on the carrier enable the system to correct positioning errors automatically, maintaining high alignment precision even when processing multiple dies in parallel at wafer scale
Solution Approach 2:
The carrier substrate acts as an intermediary between the optical dies and the final device assembly. It provides a stable, pre-characterized platform with integrated alignment features that mediates the complex alignment requirements, enabling wafer-scale processing while maintaining precision through its standardized interface and reference structures
3Measurement precision
If optical devices are tested after individual assembly, then testing accuracy is maintained, but production time and cost increase
Solution Approach 1:
The patent enables multiple optical devices to be tested simultaneously on the carrier substrate before dicing into individual devices. By merging multiple testing operations into a single wafer-level test process, testing time is dramatically reduced while maintaining accuracy through the preserved electrical and optical connections on the carrier
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs and enhances efficiency by enabling parallel assembly and testing of multiple optical devices on a wafer scale, achieving high self-alignment accuracy and simplifying the integration of optical devices with fiber arrays.
Implementation Method 1
self alignment is achieved by surface tension in liquid phase solder bumps using gaseous flux
Data Source
AI summary
Broadly speaking, disclosed is a carrier assembly for an optical device, the carrier assembly comprising in combination: a glass substrate with an optical die thereon; and a silicon carrier attached to the glass carrier. During manufacture, a number of optical dies can be attached on the glass substrate using self-alignment of AuSn solder bumps using gaseous flux at about 300 deg C. The glass carrier can be mounted to the silicon carrier to form an optical device carrier assembly comprising micromechanical guide holes to facilitate a optical fiber connection, using self-alignment of SnAg solder bumps using gaseous flux at about 250 deg C. Each individual optical device can be tested at a wafer scale. The resulting optical device assembly can be diced to form individual optical devices having a carrier assembly that exhibits the traits of both a silicon carrier and a glass carrier.


